[SI-LIST] Re: Dead Band in PLL

  • From: Ken Hayden <khayden@xxxxxxxxxxxxxxxxxx>
  • To: parthsv@xxxxxxxxx
  • Date: Wed, 19 Nov 2003 07:30:14 -0500

Partha,
Here are two untested, off-the-cuff suggestions:
1. Add DC bias to the PFD output, so that the operating phase is pulled
away from the zero-phase-shift null where the deadband occurs.  This
might work if the resulting phase shift and reduced linear control band
could be tolerated.  It will also cause jitter, however.  If a large
frequency divider is used in the feedback loop, this jitter will be
especially bad.
2. Add a second phase detector, perhaps a simple XOR detector, and sum
its analog output current with the flip-flop PFD.  Since the additional
phase detector will not have deadband at the null point, it will provide
some (reduced) gain through the PFD deadband area.  A disadvantage with
this approach is that the XOR phase detector will balance at 90 degrees
phase shift rather than 0 degrees.  This could be overcome by adding a 90
degree phase shift to the reference frequency or the feedback frequency
(for the XOR detector only), if this is feasible.  Note, however, that an
XOR phase detector also inherently causes higher jitter than a flip-flop
PFD.  And again, a frequency divider in the feedback loop makes the
jitter worse.
-Ken Hayden

Parthasarathy Sampath wrote:

> Hi All,
>   How does one reduce/avoid Dead Band in PFD. The
> usual one is to rely on small glitch generated by Two
> Flip-Flops (in case PFD is based on FF design). Is it
> the standard in the industry
>   Also, if the PFD is different from FF's,say based on
> NOR gates, how does one reduce the dead band?
>
> Thanks in Advance,
>
> Regards,
> Partha!
>
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