[SI-LIST] Re: local and global ground
- From: "Perry Qu" <perry.qu@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 29 Jan 2002 11:54:12 -0500
Larry:
You have a good point. My inital intention of this simulation is to find out
crosstalk originated from connector alone. Thus I used a very simple circuitry
with ideal voltage source with soure termination, ideal transmission line (50
ohm
t line) and 100 ohm termination at daughter card. The loca/global ground issue
came up when I hook up the circuit at main board and daughter card to the
connector model.
The ampmeter method you recommended is interesting and i haven't used it
before. I
will give it a try, not only for solving the problem but for my own learning
and
understanding.
BTW, thanks for all those who replied. I do benifit a lot from this discussion.
Regards
Perry
Larry Smith wrote:
> This is a very interesting discussion. I often use power plane
> transmission line models that completely account for all current into
> and out of a driver or receiver. The power path is very low impedance
> for loop current but very high impedance to current that does not
> return in the power path ...kind of like our products. :)
>
> If there happens to be a sneak path to spice node zero, very strange
> simulation occurs. The circuit can fail to converge or else very
> unrealistic voltages are obtained, sometimes 1000's of volts if current
> sources are involved. This happens when driver or receiver circuits
> force current to spice node 0 instead of allowing it to return through
> the power terminals of the circuit.
>
> An easy way to check for this is to put an ammeter (zero volt voltage
> source) on all ports of the circuit. Sum the currents through the
> ammeters in an output parameter. Kirkoff tells us that the sum should
> be zero. If it is not, you have a sneak path to spice node zero. That
> is like current jumping from somewhere inside of our product to the
> center of the earth without ever going through our packaging. Hmmmm.
>
> This can happen even if there are no global or specific references to
> spice node zero in the circuit. Many transistor .model statements
> manage to "eat" the current. These models will cause havoc in power
> distribution analysis where all current is expected to return through
> the packaging.
>
> regards,
> Larry Smith
> Sun Microsystems
>
> > Delivered-To: si-list@xxxxxxxxxxxxx
> > Date: Tue, 29 Jan 2002 10:37:19 -0500
> > From: "Perry Qu" <perry.qu@xxxxxxxxxxx>
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> > Subject: [SI-LIST] Re: local and global ground
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> >
> >
> > Andy:
> >
> > Thank you for sharing your experience on this. I rechecked the 2 models from
> > 2 vendors. I did not find any .Global statements in either of them. But in
> > one of the model, I do find node 0 inside the model, which may be the reason
> > that give me "inductor/voltage loop" error.
> >
> > In the case of the second model, there is no 0 node inside the model and the
> > vendor claim that they run this type of simulation without any problem in
> > another SPICE tool. I have sent the HSPICE deck to the vendor and ask them
> > to try it out. This is case where I see big spike on ground (amplitude even
> > a few times bigger than my incident voltage swing).
> >
> > Regards
> >
> > Perry
> >
> > "Ingraham, Andrew" wrote:
> >
> > > I have done what you are trying to do ... use a local non-ground
> > > reference in HSPICE ... and it can work if done right.
> > >
> > > Sometimes you run into problems where some vendor's model has hidden
> > > connections to ground, either because it is encrypted so you can't tell
> > > what the heck is in it, or because they did something incredibly
> > > un-user-friendly like having .GLOBAL node statements within their
> > > subcircuits. I have spent hours un-doing this kind of junk in vendor
> > > models.
> > >
> > > But in your case the daughter card side is so simple, that I suspect the
> > > connector models are at fault.
> > >
> > > Are you sure the connector models were created to include what one might
> > > call "common mode" effects, when the two sides are unhinged? If it only
> > > models local effects between neighboring pins, or if it was intended to
> > > have reference node 0 on both sides, it might have completely missed the
> > > effects between the two boards. Getting a totally "correct" model that
> > > really behaves just like the real connector, under all conditions, isn't
> > > something that just automatically pops out of the modeling process.
> > > Just like SPICE's transmission line model ignores the common-mode
> > > (unless we explicitly include it, which takes some effort), the
> > > connector models might have done the same.
> > >
> > > What you are seeing is probably not "numerical noise", but rather "real"
> > > noise from the point of view of the simulator, but due to poor modeling.
> > > There's a difference.
> > >
> > > I am puzzled why the second vendor's model gives you an
> > > "inductor/voltage loop" error message, which is fixed by connecting the
> > > daughter card side to node 0. Usually that error means there is a
> > > connection that shouldn't be there, like maybe you unintentionally
> > > re-used a node number. I might have expected a "floating node" or "no
> > > DC path to ground" error message, in your case. Track down exactly
> > > where that inductor/voltage loop is, it might tell you something.
> > >
> > > Andy
> > >
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> >
> > --
> > Perry Qu
> >
> > Product Integrity | 600 March Road
> > Alcatel Canada | Ottawa, ON K2K 2E6, Canada
> >
> > DID: (613) 7846720 | FAX: (613) 5993642
> >
> >
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--
Perry Qu
Product Integrity | 600 March Road
Alcatel Canada | Ottawa, ON K2K 2E6, Canada
DID: (613) 7846720 | FAX: (613) 5993642
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