[SI-LIST] Re: Why we need to use "Series resistor" at Transmitter?
- From: Ray Anderson <Raymond.Anderson@xxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 28 Oct 2002 09:36:03 -0800 (PST)
James' response highlights two things:
* Too much of a 'good' thing may be bad.
* Sometimes actions that are 'good' for SI purposes
may be 'not so good' from an EMI/EMC perspective.
(and vice-versa)
-Ray Anderson
Sun Microsystems Inc.
>
>Though there maybe arguments for wanting increase overshoot, etc. there is
>also a very good reason to use the series resistor to reduce EMC.
>The basis for this is to disipate the reflected signal of the unterminated
>line. The capacitance at the receiving device can also accentuate this problem.
>
>I would also like to highlight.
>Series termination shoulkd NEVER be used wher the path is going to more than
>one input i.e bus configuration.
>I have seen this happen in too many designs and the result of double clocking
>due to the non-monotonic edges of the clocks!!!
>
>--
>Regards, __________ James G Roberts
> /___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx
> Jim __ / /___/ / jgroberts@xxxxxxxxxx
> / /_/ /---| | Room: BE436, Hilversum
> \____/ /_/ Tel: +31 35 687 4308 Fax: 5976
>
>
>Scott McMorrow wrote:
>>
>> I am in agreement with Ray.
>>
>> I have found that the best way to approach termination design is from
>> the worst case overshoot perspective. Determine the worstcase overshoot
>> that your bus can tolerate. Set up a simulation where multiple drivers
>> in a package are driven in the even mode on a bus with parallel traces
>> from the driver to the receiver. Adjust the termination resistance and
>> the trace spacing to optimize the worst case fast process response at
>> the receiver for overshoot that is within the maximum limit that you
>> require, and crosstalk noise on a quiet line that is within your noise
>> limits. (We include crosstalk and sso in the simulation experiment,
>> since these will also cause some amount of overshoot at the receiver.)
>> Optimize for the lowest series resistance in conjunction with the
>> minimum allowable trace spacing. The optimization can be done through
>> multiple sweeps, or through the Hspice optimize functions.
>>
>> Once you have found the minimum resistor tolerable for the design, you
>> will need to increase it's value to compensate for % tolerance and
>> select a value which meets your minimum tolerance requirement. At this
>> point, you have designed the interconnect to be as fast as possible.
>>
>> best regards,
>>
>> scott
>>
>> --
>> Scott McMorrow
>> Teraspeed Consulting Group LLC
>> 2926 SE Yamhill St.
>> Portland, OR 97214
>> (503) 239-5536
>> http://www.teraspeed.com
>>
>> Ray Anderson wrote:
>>
>> >All of what Jeff says is very true.
>> >
>> >One other thing about the series termination technique which has been
>> >discussed on the si-list before, but which may bear repeating for new
>> >members, is that by slightly "undersizing" the series resistor by a few (say
>> >5 or less) ohms such that Zdrv + Rt < Znom of the transmission line you can
>> >induce a small amount of overshoot at the receiver that has the net effect
of
>> >reducing the effective rise time of the signal and reducing the delay by a
>> >small amount. You don't want to get carried away and make the series
>> >termination resistor too small or you will induced too much overshoot and
>> >ringing at the receiver.
>> >
>> >As an example, assume the output impedance of your driver is 25 ohms and you
>> >are driving a 50 ohm line. A reasonable value for the series resistor might
>> >be 20 or 22 ohms in lieu of the 25 ohms for a perfect match.
>> >
>> >Either set up a spice simulation and see what happens with a specific
>> >value resistor or get out the scope and soldering iron in the lab
>> >and try it there.
>> >
>> >-Ray Anderson
>> >Sun Microsystems Inc.
>> >
>> >
>> >
>> >
>> >>Typically, the series resistor is sized such that the transmitter
>> >>impedance PLUS the series resistor match the trace impedance. This
>> >>will be the reason why you are using a 33ohm resistor. If you check
>> >>the imedance of your transmitter, you should find it is about 20ohms
>> >>give or take a few ohms. This is typical in a LVCMOS type
>> >>transmitter, I would believe. I'm sure folks will correct me if I am
>> >>wrong.
>> >>
>> >>In this manner, you create a transmitter with the desired output
>> >>impedance, so there is little or no impedance mismatch between the
>> >>transmitter and the line trace impedance. For placement, it should
>> >>be placed "as close as possible" to the transmitter. As a rule of
>> >>thumb, it should be well within the rise time of the transmitter
>> >>otherwise, you effectively have a transmission line between the
>> >>transmitter and the series resistor which will give you two
>> >>discontinunities rather than eliminating one.
>> >>
>> >>Hope this helps.
>> >>
>> >>Jeff Reynolds
>> >>
>> >>
>> >>
>> >
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>> >
>>
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>
>--
>Regards, __________ James G Roberts
> /___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx
> Jim __ / /___/ / jgroberts@xxxxxxxxxx
> / /_/ /---| | Room: BE436, Hilversum
> \____/ /_/ Tel: +31 35 687 4308 Fax: 5976
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