[SI-LIST] Re: Why we need to use "Series resistor" at Transmitter?
- From: pwelling@xxxxxxxxxxxxxx
- To: Raymond.Anderson@xxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 28 Oct 2002 13:39:03 -0700
Hi,
When preparing a project for EMC design, test and debug, it is a good
practice to create an array of frequencies to source suppress or contain.
This is sometimes called a frequency map and is composed of the even and odd
harmonics of fundamental frequencies contained in the system. I even try to
predict edge rates that will tell me how far out in the spectrum a clocked
signal will be a problem. The even harmonics are included for integrated
rise/fall times, and RF devices. The completed map includes oscillator
frequencies, bus clocks, high rate strobes, RF clocks, PLLs, etc. This list
is valuable during all phases of electrical design (Signal Integrity & EMC),
Mechanical design (containment gasketing, allowable slots, cooling vents,
material shielding), and System Level design (cable shielding requirements,
grounding requirements, etc). It is also valuable at the test level when
narrowband emissions fail. Their frequency source(s) may located quickly and
corrected.
Good Signal Integrity design is almost always good EMC design. When signals
are not well terminated, as has been mentioned, reflections may result. The
problem with the reflections are that they create new frequencies based on
the trace propagation, that are unexpected and
not part of the frequency array. The damped sinusoid reflection frequency is
created by the propagation of the wavefront down the trace and back until
damped out. Since trace propagation is dependent on length, each reflection
source may have its own unique reflection frequency. This creates multiple
unexpected frequencies, some higher than the fundamentals. The amplitude is
smaller but the frequencies may propagate via cable shield terminations or
reference plane noise. This is another good reason to locate ceramic
decoupling capacitors near I/O connectors to provide a preferred return path
and keep that loop current confined to a small area. I have seen this happen
both with cables and on circuit cards. These reflections also create
standing waves on cables that are hard to pin down in some cases.
Providing termination to prevent the reflections from occurring is good
practice.
Philip Ross Wellington
Mgr. Signal Integrity & EMI
L-3 Communications CSW
-----Original Message-----
From: Ray Anderson [mailto:Raymond.Anderson@xxxxxxx]
Sent: Monday, October 28, 2002 10:36 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Why we need to use "Series resistor" at
Transmitter?
James' response highlights two things:
* Too much of a 'good' thing may be bad.
* Sometimes actions that are 'good' for SI purposes
may be 'not so good' from an EMI/EMC perspective.
(and vice-versa)
-Ray Anderson
Sun Microsystems Inc.
>
>Though there maybe arguments for wanting increase overshoot, etc. there is
>also a very good reason to use the series resistor to reduce EMC.
>The basis for this is to disipate the reflected signal of the unterminated
>line. The capacitance at the receiving device can also accentuate this
problem.
>
>I would also like to highlight.
>Series termination shoulkd NEVER be used wher the path is going to more
than
>one input i.e bus configuration.
>I have seen this happen in too many designs and the result of double
clocking
>due to the non-monotonic edges of the clocks!!!
>
>--
>Regards, __________ James G Roberts
> /___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx
> Jim __ / /___/ / jgroberts@xxxxxxxxxx
> / /_/ /---| | Room: BE436, Hilversum
> \____/ /_/ Tel: +31 35 687 4308 Fax: 5976
>
>
>Scott McMorrow wrote:
>>
>> I am in agreement with Ray.
>>
>> I have found that the best way to approach termination design is from
>> the worst case overshoot perspective. Determine the worstcase overshoot
>> that your bus can tolerate. Set up a simulation where multiple drivers
>> in a package are driven in the even mode on a bus with parallel traces
>> from the driver to the receiver. Adjust the termination resistance and
>> the trace spacing to optimize the worst case fast process response at
>> the receiver for overshoot that is within the maximum limit that you
>> require, and crosstalk noise on a quiet line that is within your noise
>> limits. (We include crosstalk and sso in the simulation experiment,
>> since these will also cause some amount of overshoot at the receiver.)
>> Optimize for the lowest series resistance in conjunction with the
>> minimum allowable trace spacing. The optimization can be done through
>> multiple sweeps, or through the Hspice optimize functions.
>>
>> Once you have found the minimum resistor tolerable for the design, you
>> will need to increase it's value to compensate for % tolerance and
>> select a value which meets your minimum tolerance requirement. At this
>> point, you have designed the interconnect to be as fast as possible.
>>
>> best regards,
>>
>> scott
>>
>> --
>> Scott McMorrow
>> Teraspeed Consulting Group LLC
>> 2926 SE Yamhill St.
>> Portland, OR 97214
>> (503) 239-5536
>> http://www.teraspeed.com
>>
>> Ray Anderson wrote:
>>
>> >All of what Jeff says is very true.
>> >
>> >One other thing about the series termination technique which has been
>> >discussed on the si-list before, but which may bear repeating for new
>> >members, is that by slightly "undersizing" the series resistor by a few
(say
>> >5 or less) ohms such that Zdrv + Rt < Znom of the transmission line you
can
>> >induce a small amount of overshoot at the receiver that has the net
effect
of
>> >reducing the effective rise time of the signal and reducing the delay by
a
>> >small amount. You don't want to get carried away and make the series
>> >termination resistor too small or you will induced too much overshoot
and
>> >ringing at the receiver.
>> >
>> >As an example, assume the output impedance of your driver is 25 ohms and
you
>> >are driving a 50 ohm line. A reasonable value for the series resistor
might
>> >be 20 or 22 ohms in lieu of the 25 ohms for a perfect match.
>> >
>> >Either set up a spice simulation and see what happens with a specific
>> >value resistor or get out the scope and soldering iron in the lab
>> >and try it there.
>> >
>> >-Ray Anderson
>> >Sun Microsystems Inc.
>> >
>> >
>> >
>> >
>> >>Typically, the series resistor is sized such that the transmitter
>> >>impedance PLUS the series resistor match the trace impedance. This
>> >>will be the reason why you are using a 33ohm resistor. If you check
>> >>the imedance of your transmitter, you should find it is about 20ohms
>> >>give or take a few ohms. This is typical in a LVCMOS type
>> >>transmitter, I would believe. I'm sure folks will correct me if I am
>> >>wrong.
>> >>
>> >>In this manner, you create a transmitter with the desired output
>> >>impedance, so there is little or no impedance mismatch between the
>> >>transmitter and the line trace impedance. For placement, it should
>> >>be placed "as close as possible" to the transmitter. As a rule of
>> >>thumb, it should be well within the rise time of the transmitter
>> >>otherwise, you effectively have a transmission line between the
>> >>transmitter and the series resistor which will give you two
>> >>discontinunities rather than eliminating one.
>> >>
>> >>Hope this helps.
>> >>
>> >>Jeff Reynolds
>> >>
>> >>
>> >>
>> >
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>> >
>> >
>>
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>
>--
>Regards, __________ James G Roberts
> /___ ____ | jrobert@xxxxxxxxxxxxxxxxxxxxx
> Jim __ / /___/ / jgroberts@xxxxxxxxxx
> / /_/ /---| | Room: BE436, Hilversum
> \____/ /_/ Tel: +31 35 687 4308 Fax: 5976
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