[SI-LIST] Re: Why we need to use "Series resistor" at Transmitter?
- From: Ritchey Lee <leeritchey@xxxxxxxxxxxxx>
- To: sandord@xxxxxxxxxxxxx
- Date: Tue, 29 Oct 2002 08:17:56 -0800
The PCI bus, whick all PCs contain, is series terminated. How many million of
those are there? Just have to be careful when you clock data off the bus.
Lee
Sandor Daranyi wrote:
> > Jim,
> >=20
> > In regard to your comment: "Series termination
> > shoulkd NEVER be used wher the path is going to more
> > than one input i.e bus configuration.". The ATA/IDE
> > interface used in PCs is series terminated at the
> > source and is bussed to two loads on data and
> > strobe lines. The number of working systems in the
> > field is in the millions (every PC that has 2
> > drives). The value of the series termination is a
> > great consideration (in ATA it is 22-50ohms).
> >=20
> > So series termination in busses can work. Though, I
> > recommend a thorough understanding of the system
> > before employing this technique.
> >=20
> >=20
> > Charles Hill, consultant
>
> I concur. In theory, I agree that it's not "nice", but I've seen series te=
> rminations (with no parallel termination at the far end) used successfull=
> y in designs where there were multiple inputs on a trace. "Never" sounds=
> neat but as with most good rules, there are exceptions.
>
> I also agree with the caveats. In the examples I remember, the system was =
> running at a low clock frequency and all the inputs (not more than 3 in t=
> hat case) were close to each other at the end of a long trace. It was of=
> a daisy-chain topology, i.e. there were no branches on the trace, to min=
> imize the impedance discontinuities and reflections. The inputs had high=
> impedance. Of course, one gotta think twice, even thrice, before doing =
> this on a clock signal.
>
> Sandor
>
> ---
> Sandor Daranyi
> Snr Design Engineer
> Aristocrat Technologies Australia
>
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