[SI-LIST] Re: Testing chips with system level specs
- From: "Pommerenke, David" <davidjp@xxxxxxx>
- To: <doug@xxxxxxxxxx>, "SI-List" <si-list@xxxxxxxxxxxxx>, "emc-pstc" <emc-pstc@xxxxxxxx>
- Date: Mon, 4 Sep 2006 05:09:39 -0500
Group,
I like the idea from Doug to use a ferrite for reducing the risetime of a
contact mode ESD generator. However, I do not agree to the statement that air
discharge ESD will not show fast risetimes and high peak values at voltages
above 4kV. The reference event for the ESD standard IEC 61000-4-2 is the
discharge between a hand-held metal part and a large metallic surface (called
"hand-metal ESD") in contrast to the IC-HBM standard that is based on a
discharge from the skin.
The current has two maxima, an initial peak caused by the charges on teh hand
and on the metal part and the later body waveform. If the initial peak will
show up depends on the resistance of the arc as a function of time. If the arc
resistance drops quickly (let us say in less than 1ns) below the source
impedance of the discharging person (without going into details, assume 100-300
Ohm http://web.umr.edu/~davidjp/paper/00478274.pdf ), then the inital peak will
show up. If the arc resistance drops slowly, let us say it reaches 300 Ohm in 5
ns, then the initial peak will not show up, as the arc resistance is too high
during this phase of the discharge.
So the quesion is: How fast does the arc resistance drop?
This depends mainly on:
- Voltage at the moment the discharge starts
- Gap distance at the moment the discharge starts
The smaller the gap, the faster the arc resistance will drop. The gaps will in
most cases not discharge over distances given by the Paschen-law, but at
smaller distance. This is a result of the speed of appraoch and the statistical
time lag ().
In general the behavior is as follows:
Fast rise times --- Slow rise times
Fast approach slow approach
Dry air Moist iar
Clean surfaces Dirty surfaces
Oxid layer, or paint
The effect of environmental conidtions on the discharge are very strong.
Humidity dominates over all other influencing factors (I can email papers on
this topic on request). It is not possible to state: Above XYZ kV discharges
will not have an initial peak.
To provide further evidence I attached a set of measurements that show the peak
current as a function of voltage having the arc length as parameter. The data
is from D.Pommerenke, ESD: Transient fields, arc simulation and rise time
limits, Journal of Electrostatics, 36, 1995, 31-54.
However, the likelyhood of having fast risetimes (e..g, less than 200ps)
decreases above about 6-10 kV. Nobody knows the distribution of ESD intensity
in reality very well. There are a few studies, but they only help to answer the
question of voltage distribution, not of rise time distribution or field
strengths distribution.
Overall, I warn against changing the pulse parameters above some voltage
without having strong evidence that the reduction in protection level is
acceptable, the 0.7ns-1ns risetime is already providing only partial coverage.
Products that may see many ESDs or support critical functions should certainly
not be tested at a different waveform. The 0.7ns - 1ns rise time standardized
contact mode waveform certainly does not cover the faster ESD events.
Regards,
David Pommerenke
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx on behalf of Doug Smith
Sent: Sun 9/3/2006 11:03 PM
To: SI-List; emc-pstc
Subject: [SI-LIST] Testing chips with system level specs
Hi All,
I have been writing and recording again, this time on applying system
level ESD tests to devices. If you are involved with either devices
that can be handled by people (for instance a USB thumb drive for
flash memory card) or the equipment they plug into you will find my
latest article and podcast of interest. Any standards people out there?
This month's Technical Tidbit describes a method to simulate air
discharges at voltages above 4 kV in a repeatable way using a modified
contact discharge. This method is especially useful in ESD testing of
solid state circuits using IEC 61000-4-2.
Abstract: Contact discharge is used in ESD testing to improve test
repeatability, yet air discharge has significantly different
characteristics at higher voltages. A test method is described that
uses a modified contact discharge to simulate the characteristics of
an air discharge but with improved repeatability.
The link to the article is the picture of the experimental test setup
at the bottom of the home page at http://emcesd.com . Or just click on
this link:
http://emcesd.com/tt2006/tt090106.htm
There is also an audio discussion of this article on my podcast site:
http://emcesd-podcast.com where the direct link to the audio file is:
http://emcesd-podcast.com/2006/september/2006-0904.mp3
Can't download mp3 files? Download the following instead:
http://emcesd-podcast.com/2006/september/2006-0904.dcs
After download, change the extension from .dcs to .mp3 and the file
will then be able to play on most computers.
Doug
--
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___ _ Doug Smith
\ / ) P.O. Box 1457
========= Los Gatos, CA 95031-1457
_ / \ / \ _ TEL/FAX: 408-356-4186/358-3799
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| q-----( ) | o | Email: doug@xxxxxxxxxx
\ _ / ] \ _ / Website: http://www.dsmith.org
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