[SI-LIST] Re: SV: Re: Copper Fill --- correction
- From: Alex McPheeters <amcpheeters@xxxxxxxx>
- To: jtidman@xxxxxxxxxxxxxx, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 14 Jun 2002 11:15:56 -0400
Kudos, better explanation of the fabricators challenge and intent, clearly
not my expertise, regardless we would prefer to know when the fab has
determined it is required so as to avoid EMC concerns of any sort.
Alex McPheeters
At 09:52 AM 6/14/02 -0500, James Tidman wrote:
>
>No, "copper thieving" is essential for getting good etch performance on =
>the board during FAB. =20
>
>When etching a board that contains very fine features (typically < 4mil =
>trace, 4mil gap; depends on FAB vendor's capability), it is important =
>that the acidity of the chemical etch near the board surface be kept =
>constant. Large areas of copper will decrease the acidity (as it is =
>dissolved) of the solution near those areas, creating a non-uniform =
>chemical profile across the board - which is not good. By thieving, or =
>stealing, the copper from the solution (i.e. by not etching it away) the =
>board manufacturer can decrease the non-uniformity of the etch solution =
>and better control the fine feature performance.
>
>Regards,
>
>James Tidman
>Sr. Member Technical Staff
>Banderacom <http://www.banderacom.com/>
>
>
>-----Original Message-----
>From: Alex McPheeters [mailto:amcpheeters@xxxxxxxx]
>Sent: Friday, June 14, 2002 9:43 AM
>To: htmguy@xxxxxxxxx; Jason.d.Leung@xxxxxxxxxxx; Anders Ekholm (ERA)
>Cc: scott@xxxxxxxxxxxxx; RayCaliendo@xxxxxxxxxx; silist
>Subject: [SI-LIST] Re: SV: Re: Copper Fill --- correction
>
>
>
>The little square pads applied by the PCB vendor which you are referring =
>to
>are probably "thieving" as in "stealing", they are applied to prevent
>soldier from washing to heavily into areas with many, many small =
>discretes
>during the wave process. Note when you see this distinctive grid =
>pattern
>that it will be roughly aligned with the direction of the wave and ahead =
>of
>the area the fabricator is concerned will have issues during assembly.
>
>There are many resultant issues when thieving is not used, the most well
>known is probably "tombstoning" where small discretes aligned with the =
>wave
>end up standing on end due to the force of the soldier "wave".
>
>hydrostatic action of the thieving pads prevents this from happening by
>decreasing the volume of soldier traveling into densely populated areas.
>
>At 07:12 AM 6/14/02 -0700, Mellberg Hans wrote:
>>
>>Usually the PCB vendor will determine if a certain
>>amount of copper fill is required. I have seen some
>>motherboards with little square pads that varried in
>>size to compensate (or "balance") for the copper on
>>the other side of that laminate. The fill was not on
>>the layout. The same design by another PCB vendor did
>>not use copper balance fill. The performace was
>>similar except for some additional EMI from the board
>>with the extra fill.
>>
>>--- Jason D Leung <Jason.d.Leung@xxxxxxxxxxx> wrote:
>>> Hi Anders Ekholm:
>>> thanks
>>> then how do we know when it is necessary for us to
>>> have copper balance, and how much
>>> copper we should be using to do the job
>>>=20
>>> best Regards
>>> Jason
>>>=20
>>>
>>
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>
>Alex McPheeters
>Vice President, Business Development
>American Computer Development Inc.
>Office - (301) 620-0900
>Fax - (301) 620-9099
>Cell - (301) 305-3051
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Alex McPheeters
Vice President, Business Development
American Computer Development Inc.
Office - (301) 620-0900
Fax - (301) 620-9099
Cell - (301) 305-3051
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