[SI-LIST] Re: SSO pushout, ground bounce definition

From: Pat Diao <Pat_Diao@xxxxxxxx>
To: 'Larry Smith' <ldsmith@xxxxxxxxxxxxxxxxxx>, si-list@xxxxxxxxxxxxx
Date: Wed, 17 Apr 2002 17:19:53 -0700
Hi Larry,

Thanks for the message.  The issue regarding inductance is becoming clear in
definition, but still confusing in application.  I found the following in
Ansoft tech note:

"AC Inductance: 
All current in AC analysis are surface currents.  To take this into account,
the system computes the surface magnetic field, H, such that 
H = ...
H dot n =0
At high frequencies, the magnetic field is tangential to the surface of a
good conductor. After solving for the magnetic field, the system computes
the surface current density K:
K = n x H
and the inductance is found using the relationship:
L = (integral over S)(A dot K dV) "

I think the calculation is sound for partial L. Frankly this is the only way
I can see to calculate the partial L. Then it come back to the question why
different extractors may come up with different partial L?  Do they use
radically different ways to figure out Partial L?

Regards,
Pat

-----Original Message-----
From: Larry Smith [mailto:ldsmith@xxxxxxxxxxxxxxxxxx]
Sent: Wednesday, April 17, 2002 9:46 AM
To: ldsmith@xxxxxxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx; Pat_Diao@xxxxxxxx
Subject: Re: [SI-LIST] Re: SSO pushout, ground bounce definition


Pat - thanks for the comment.

With almost every electromagnetic extractor you have to be thinking
about where the return current is when you set up the problem.  Where
is the reference node?  This is especially true with Ansoft as they
make it very easy for you to magically source current somewhere in the
problem and then magically sink current somewhere else.  Unless you try
really hard to complete the return path, you will obtain a partial
inductance with all the associated problems discussed in previous
emails.  

To get valid circuit simulation results, you have to apply Vdd and
Ground currents to the ports that you assumed when set up the
extraction problem.  Said another way, before you run the extraction
problem, you have to anticipate where your return currents will flow in
your simulation.  I have seen many cases where SI engineers do Ansoft
extraction for an SSN problem and the only nodes present are signals
and grounds.  If they leave out the Vdd path, they have left out half
of the return current path.  ...On the bright side, their simulation
results will be within 50% of being correct.

It has been several years since I actively worked with Ansoft, but I
often advise engineers that do.  For power distribution analysis, I
usually tell them to short the Vdd and ground structures on one side of
the problem, probably at the PCB power planes.  Then, force and sink
current in close proximity to each other, probably on some chip or
chip-connect structures.  That way, current is forced to run in a
loop.  Take the loop inductance number that you get from that
extraction, divide by 2 and call it the "half loop inductance".  In the
circuit simulation, assign a half loop inductance to Vdd and another
half loop inductance to ground.  I have no idea what the partial or
mutual inductances are for that problem, nor do I care.  They don't
mean anything anyway.  

I see a lot of guys draw up the ground structures and extract a partial
inductance.  Then they draw up the Vdd structures and extract a partial
inductance.  Then they combine the the two partial inductances in the
same circuit simulation problem (with no mutuals) and obtain very
incorrect results.  To get correct results, you have to set up the
extraction problem the way you are going to simulate it and simulate
the extracted matrix the way you set it up in extraction.  User
beware!

For the SSN problem, you almost have to draw the Vdd, Ground and signal
structures all at the same time.  You then need input and output ports
for each power, ground and signal structure.  The path that return
current takes through the structure depends greatly upon the data
patterns given to the drivers in circuit simulation.

Your second question has to do with the sign polarity on the mutual
inductance.  Many extractors will place a minus sign in front of the
mutual inductance, in that case, you want to add it.  This question is
closely related to where you put the dots on a transformer.  From a
physical perspective, if currents are running parallel (the same
direction) as each other, the flux and mutuals are going to add to the
loop inductance.  If currents are running opposite directions to each
other, the flux and mutuals are going to subtract from the loop
inductance.

regards,
Larry Smith
Sun Microsystems

> Delivered-To: si-list@xxxxxxxxxxxxx
> From: Pat Diao <Pat_Diao@xxxxxxxx>
> To: "'ldsmith@xxxxxxxxxxxxxxxxxx'" <ldsmith@xxxxxxxxxxxxxxxxxx>, 
si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: SSO pushout, ground bounce definition
> Date: Tue, 16 Apr 2002 16:51:09 -0700
> MIME-Version: 1.0
> Content-Transfer-Encoding: 8bit
> X-archive-position: 2675
> X-ecartis-version: Ecartis v1.0.0
> X-original-sender: Pat_Diao@xxxxxxxx
> X-list: si-list
> 
> 
> Hi Larry,
> 
> Very nice writing about the partial and loop inductance.  I agree that a
> partial inductance is meaningless without defining the loop.  However,
there
> are two practical questions remaining:
> 
> 1.  Most of the RLC extractors, including Ansoft Q3D which I use, only
> require users to define the source and sink locations on the net.  You can
> draw a ground plane but it is not required, and sometimes there is no
ground
> plane nearby.  It then calculates the inductance of the net, which is of
> course the "partial inductance".  But the question is, where is the other
> portion of the "loop"?  There could be a hundred different ways to define
> the other portion of the loop.  Then will we have a hundred different
> inductance values for the net? 
> 
> 2.  On the loop inductance, there is no question about 
> L(loop) = L1 + L2 - 2*M12
> But occasionally one can see 
> L(loop) = L1 + L2 + 2*M12 
> Is this a totally wrong equation or the mutual inductance can be of
> different signs?
> 
> Thanks,
> Pat 
> 
> 
> 
> -----Original Message-----
> From: Larry Smith [mailto:ldsmith@xxxxxxxxxxxxxxxxxx]
> Sent: Tuesday, April 16, 2002 1:56 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: SSO pushout, ground bounce definition
> 
> 
> 
> Hmmm.  Looks like my table separated by tabs did not make it... 
> I'll try it again.  The table in the text has been replaced.
> 
> ------------- Begin Forwarded Message -------------
> 
> Ege - I don't believe there is any contridiction between non-unique
> inductance matricies and unique system voltages.  Partial inductances
> are valid as long as they are defined in the context of a loop.
> Partial inductances by themselves have no meaning.  But in an
> inductance matrix, where they are combined with all partials and
> mutuals in a loop, the extracted values (not unique) can be used to
> find unique voltages and currents within that loop.
> 
> Take the example of two connector pins, one used for a signal and the
> other used for ground.  Loop inductance in this case is L1+L2-2*M12
> (the sum of the self inductances minus two times the mutual inductance
> between them).  The following partial and mutual inductances might be
> obtained from two different electromagnetic extractors:
> 
> extractor   L1      L2      M12     Loop L   units
> ---------   -----   -----   -----   ------   -----
> 1           10      10      9        2       nH
> 2           2       2       1        2       nH
> 
> Which extractor got the right answer?  They both did.  Partial and
> mutual inductances are meaningless outside the context of a loop.  Both
> sets of extracted data give the same loop inductances and will lead to
> unique voltages and currents when the loop is simulated in a circuit
> analysis tool, even though the extracted partial and mutual inductances
> are not unique. =20
> 
> I see a lot of engineers try to use partial inductance (alone) in a
> circuit simulation.  This is at best misleading and may give flat out
> wrong answers in the simulation.  I don't think you will find any
> disagreement between Al Ruehli, Bryan Young or any of the other experts
> in this matter (please comment if I have misspoken).
> 
> Now concerning measurements, simulation, SI and EMI...  For SI
> purposes, it only makes sense to measure voltages in very local areas
> with a probe that has a very short ground lead.  When we measure a
> signal with respect to (WRT) local ground, we have measured a
> "difference" voltage.  This is a differential measurement, even if it
> is done with a single ended probe.  We have not measured the signal WRT
> spice node 0, the center of the earth, or any other place in the
> system.  If a simulation is set up correctly, the inductance matrix
> from either extractor 1 or 2 above will deliver an inductance matrix
> that can be simulated and match the hardware measurement of a signal
> WRT it's local ground.
> 
> As Raymond Chen has stated in points one and two below, it does not
> make sense to measure anything other voltage WRT local ground.  There
> are at least two problems with measurements that are not made WRT local
> ground.  If we try to measure across several inches (significant
> portion of a wavelength) we are trying to measure across a time delay.
> What meaning is there in voltage measured across time?  If we try to
> measure across a big inductance (i.e. connector pin), magnetic flux
> will penetrate the loop involving the inductance, probe and ground
> lead.  The size of the measurement loop will determine the magnetic
> flux "captured" by that loop and lead to non unique measurements which
> depend on where the ground lead is positioned WRT the inductance.  With
> probes, the only legitimate thing to measure is the difference between
> a node and it's local reference point, hopefully in an area where the
> time varying magnetic field is not significant.
> 
> Even though we don't have a good way to measure "ground bounce" across
> a connector, I believe a circuit simulator with the inductance matrix
> from either extractor 1 or 2 above is capable of simulating the correct
> voltage across the ground pin of a connector (and getting an identical
> voltage solution from either matrix).  If 10 signals crossed the
> connector and all switched the same way at the same time, there would
> be a huge (almost Vdd) voltage across the single ground pin.  This is
> real and is what we call the SSN or SSO problem.  It can cause flipped
> bits and EMI radiation as one local ground gets perturbed WRT to the
> other.  Simulations of "ground bounce" are probably more trustworthy
> than measurement, assuming that all partial inductances and mutual
> inductances are given in the context of a loop.  It is difficult to
> measure ground bounce directly.  The best indicators of ground bounce
> are funny waveforms at the far end of a quiet line and EMI radiation.
> 
> regards,
> Larry Smith
> Sun Microsystems
> 
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[SI-LIST] Re: SSO pushout, ground bounce definition

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