Chris, To give you and the rest of the readers a little background and history, I didn't "invent" IBIS so that I could go to exotic places. I developed my first behavioral model using HSPICE's controlled sources when my group was running the signal integrity simulations for the very first (33 MHz) PCI bus. This was done before anyone had a buffer design done, so the best we could do was put together an IV curve and edge rate based behavioral model to show that the reflected wave switching (and in those days we also looked at the incident wave switching version) PCI bus will work. And the reason this behavioral HSPICE model turned into the IBIS specification was because this model was successful and there was a great demand for it, even by our customers. Regarding tweaking the design and the time it takes to convert to IBIS, in my experience it was the other way around. We (the SI team) would come up with the characteristics of the buffer using behavioral models because it would be a lot easier to tweak the IV curves, the edge rates, and the die capacitance values of the behavioral model than keep tweaking the transistor parameters and the circuit design, and we would then give the behavioral model to the designers as a specification to be implemented in silicon. Also, what I hear from various experienced engineers is that the latest and greatest high speed buffers are becoming easier to model (behaviorally) because they tend to be more linear than ever before, and due to the high speeds they also have to be kept simple. By the way, there is a great deal of myth going around out there about the accuracy of transistor level models. People tend to think that it is the most accurate way of modeling circuits because it has "all" the detail. The only thing they forget is that if they don't have the correct process parameters and/or SPICE options, they can get a lot of garbage. I have had this experience numerous times. Even our design engineering team has been hurt by this=20 problem on more than just one occasion... So the great demand you are referring to is not a proof for the goodness of SPICE models. I am not saying this to put down SPICE, it has a lot of merits, but people should not trust it as blindly as they do. I have a question for you: Have you ever wondered whether we should start using those models and simulators which are commonly used by process design engineers? They do their work with even more detail, involving quantum effects, crystal structures, doping, electron mobility in the crystal, etc... If "more detail =3D higher accuracy" is true, we should all start using these models for our bleeding edge high speed buffers, instead of SPICE since SPICE is just a behavioral abstraction of those..., correct? Hmmm... how come we don't do it? Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -----Original Message----- From: Chris Cheng [mailto:Chris.Cheng@xxxxxxxxxxxx]=20 Sent: Tuesday, May 04, 2004 6:30 PM To: Muranyi, Arpad; si-list@xxxxxxxxxxxxx Subject: RE: [SI-LIST] Re: [SI-LIST]: Which tool is the best Arpad, At the end of the day, our differences lie in your believe that = abstracting an accurate I/O model is trivia and running the analysis dominates the design process.=20 I believe the tasking of abstracting an accurate I/O takes longer time = than the actual analysis itself especially when the I/O is constantly tuned = to optimized for the best performance. Whose right or wrong ? I don't know. All I know is when presented with = the same set of design accuracy criteria and given a choice of SPICE or = other tools, ALL my customers turned to SPICE instead of a behavioral model = and those who tried to abstract the I/O into behavioral models takes longer = time to generate the abstraction model than the actual topology simulation = time. And by the way, behavioral vs. SPICE models is even less than days in a = week and I can still go to church on Sunday, not the 300 times you claim. Believe it or not, I am not as single minded as you think. I actually = spent the time to benchmark both cases because I want ALL my customers to be successful. Had they wanted SPICE, I provided them, had they wanted = IBIS, I sent them IBIS too. That's why I have the comparison between them and = have the data to back up my claims. Whether I need a hole punch or missile is a subjective discussion we = won't go in. But like I say above, when given a choice between SPICE or IBIS, = ALL my customers want SPICE and no one end up using IBIS model. That says something about the nature of the project isn't it ? I always suspect many SI engineers are closet SPICE fans but their = vendors just limited their choice to IBIS only models. It may work a few years = ago, but at the speed I am dealing with nowadays, many vendors realize the importance and start handing out HSPICE encrypted models. That's a right step in direction in my book. Give them a choice and let's see what the = use. I know, I know, NIH and you certain don't get to go to standards = conferences in exotic places..... ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu