[SI-LIST] Re: SDRAM timing

  • From: "Kai Keskinen" <kalevi@xxxxxxxxxx>
  • To: <peter.zhu@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 26 Nov 2004 20:48:43 -0500

Why don't you look at some Intel, Freescale (Motorola), or other CPU with
DDR SDRAM controller or memory bridge data sheet/user manual as well as some
DDR SDRAM manufacturer's timing application notes (e.g. Micron). They are
only a few mouse clicks away using a decent search engine. You will quickly
get more info than you need.

Cheers,

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of peter zhu
Sent: Friday, November 26, 2004 6:04 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] SDRAM timing


Hi, all:

I  oftem see designer reel the PCB trace for equivalent length in SDRAM data
bus. I am very puzzled about it all the time  I think, for SDRAM data bus,
there is on need for equivalent trace length in SDRAM data bus. The timing
is determined by the longest data bus. For other SDRAM data bus, the short,
the better, and no need for equivalent. Do you think so?

Also where can I find some detailed guide for SDRAM and DDR tracing?

Thanks in advanced

Peter

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