Arun - the on-die capacitance determines the PDN impedance above a certain
frequency. This frequency is almost certainly below 800 MHz. It is the
frequency where the inductive board impedance crosses the on-die capacitance
impedance.
Most products have a frequency band where the PDN impedance exceeds target
impedance even after the on-die capacitance is considered. It seems that for
you, this starts at 75 MHz. Exceeding the target impedance represents PDN risk
but it is often too expensive to fix it. Some of us call this PDN impedance
peak "Bandini Mountain."
The important questions then become: How much transient current do we have at
Bandini Mountain frequency? How much PDN noise will the circuits tolerate in
this frequency band? These are often difficult questions with no easy answers.
For DDR, it will be signal pattern dependent.
regards,
Larry Smith
________________________________
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> on behalf of
Arun Kumar K <ArunKumar.K@xxxxxxxxxxxxxxxxxxx>
Sent: Tuesday, July 25, 2017 10:30:51 PM
To: si-list
Cc: arunka97@xxxxxxxxx
Subject: [SI-LIST] Plane impedence and Target impedence
Hi Experts,
I am small doubt in Power integrity.
I did the power integrity one of the baord which is having DDR3 which will work
at 800MTps.
But all power, related to DDR are crossing the target impedence around 75MHz.
Is this necessary to keep the plane impedence under the target impedence up to
800MHz?
If yes ->, if not -> why?
Thanks & Regards
Arunkumar K
L&T Technology Services Ltd
www.LntTechservices.com<http://www.lnttechservices.com/<http://www.LntTechservices.com<http://www.lnttechservices.com/>>
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