[SI-LIST] Re: Pin vs. Die
- From: Ravinder Ajmani <ravinder.ajmani@xxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 8 Jan 2015 21:11:39 +0000
Hi Todd,
I am in the same camp as you and Conrad. In all the simulations I have done
the signal at the die is always better than the signal at the pin. The
difference may be small for parts with small packages, but for ASICs with large
package parasitic, the signal at the pin is almost always non-monotonic. As
you have pointed out, it is the signal at the die which matters. Perhaps the
only benefit of signal at the pin is for comparison with the measured data.
Regards
Ravinder Ajmani
HGST, a Western Digital company
5601 Great Oaks Pkwy
San Jose, CA 95119-1003
ravinder.ajmani@xxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Todd Westerhoff
Sent: Thursday, January 08, 2015 12:26 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Pin vs. Die
Conrad,
Interesting question. Ultimately, it's the signal at the die that matters,
because that's the signal that gets received and processed. Anything else is
well, just, something else.
My experience matches yours - having poor signal quality at the pin but
acceptable quality at the receiving die is common, but the other way around is
rare. Uncommon enough that I can't remember the last time I saw it.
In years past, I've seen metrics that assessed signal quality at the pin, in an
effort to assure that signal quality at the die was acceptable. This was a
measurement-based methodology and I don't think it's in use anymore.
My vote - signal quality at the die is what matters.
Todd.
Todd Westerhoff
VP, Semiconductor Relations
Signal Integrity Software Inc. • www.sisoft.com
6 Clock Tower Place • Suite 250 • Maynard, MA 01754
(978) 461-0449 x24 • twesterh@xxxxxxxxxx
“I want to live like that”
-Sidewalk Prophets
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Conrad Herse
Sent: Thursday, January 8, 2015 3:04 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Pin vs. Die
Historically, when performing PCB SI (ibis) simulations I've always focused on
the SI quality of a signal when measured at the die of a receiving device, if a
signal needs to be monotonic I've ensured it's monotonic at the die rather than
at the pin. On (rare) occasions I've encountered instances where simulations
show a signal to have acceptable SI at the pin but not the die, for these cases
I've always worked to find improvements to achieve acceptable SI in the die
waveform.
Questions have been raised recently as to whether achieving good SI at the pin
of a device is adequate, without careful regard to the SI of a waveform at the
die. The rationale behind this being that datasheet specifications were
traditionally considered at the pin of a device. The reasoning goes that if
good SI is achieved at a device pin this meets the datasheet specifications and
no further improvements should be needed.
I personally do not subscribe to this line of reasoning but would be interested
in hearing feedback from others on this.
Thanks,
--
Conrad Herse
Alcatel-Lucent
Conrad.Herse@xxxxxxxxxxxxxxxxxx
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