Historically, when performing PCB SI (ibis) simulations I've always focused on the SI quality of a signal when measured at the die of a receiving device, if a signal needs to be monotonic I've ensured it's monotonic at the die rather than at the pin. On (rare) occasions I've encountered instances where simulations show a signal to have acceptable SI at the pin but not the die, for these cases I've always worked to find improvements to achieve acceptable SI in the die waveform. Questions have been raised recently as to whether achieving good SI at the pin of a device is adequate, without careful regard to the SI of a waveform at the die. The rationale behind this being that datasheet specifications were traditionally considered at the pin of a device. The reasoning goes that if good SI is achieved at a device pin this meets the datasheet specifications and no further improvements should be needed. I personally do not subscribe to this line of reasoning but would be interested in hearing feedback from others on this. Thanks, -- Conrad Herse Alcatel-Lucent Conrad.Herse@xxxxxxxxxxxxxxxxxx ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu