[SI-LIST] PCIe routing

  • From: "Girish Gopi" <girish.gopi@xxxxxxxxxxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Sat, 11 Jul 2009 17:02:10 +0530

Hi all,
I am having  the 20 layer pcb with 3MM thickness , using blind vias from 1 to 
10 and 11 to 20 layers.Where 2nd layer using for PCIe(5GB/S) routing , can I 
know that the via used for PCIe routing from layer 2 to 10 , will it be act as 
a stub ?Is there any issues?

Thanks in advance
Girish
**************** CAUTION - Disclaimer *****************This email may contain 
confidential and privileged material for the
sole use of the intended recipient(s). Any review, use, retention, distribution 
or disclosure by others is strictly prohibited. If you are not the intended 
recipient (or authorized to receive for the recipient), please contact the 
sender by reply email and delete all copies of this message. Also, email is 
susceptible to data corruption, interception, tampering, unauthorized amendment 
and viruses. We only send and receive emails on the basis that we are not 
liable for any such corruption, interception, tampering, amendment or viruses 
or any consequence thereof. 
*********** End of Disclaimer ***********DataPatterns ITS Group**********


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field


List technical documents are available at:
                http://www.si-list.net

List archives are viewable at:     
                //www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: