[SI-LIST] Re: Measurement point for DDR3
- From: Siddharth Rajagopalan <maxsidhu@xxxxxxxxx>
- To: wufengthu@xxxxxxxxx
- Date: Sat, 28 Sep 2013 11:57:41 +0530
hi mustafa,
Is probing at the TX pin really representative of the output of the
transmitter when connected to the channel?? i suppose it'll be the sum of
TX output plus the reflections from the line.
Regards,
Siddharth Rajagopalan
Signal integrity engineer,
Cisco systems
Mobile: +91 725 9277122
direct: +91 8044266229
official email: sidrajag@xxxxxxxxx
On Thu, Sep 26, 2013 at 11:14 AM, Feng Wu <wufengthu@xxxxxxxxx> wrote:
> Hi Suhua
> the signal at die pad is the one seen by receiver finally.
> But the spec could be for the signal at the pin, such as DDR3.
> --
> B.R.
> Feng Wu (å´æ«)
>
> -------------
> Signal Integrity Engineer
> Cisco Shanghai
> -------------
> 2013/9/26 wangsuhua <star_wang1@xxxxxxxxxxx>
>
> > so my understand is we should probe at die when simulation, because die
> is
> > last receive, a real signal. is it right
> >
> > > Date: Mon, 2 Sep 2013 10:22:44 +0800
> > > Subject: [SI-LIST] Re: Measurement point for DDR3
> > > From: wufengthu@xxxxxxxxx
> > > To: yousufs432@xxxxxxxxx
> > > CC: ted.clark@xxxxxxx; si-list@xxxxxxxxxxxxx
> > >
> > > Hi Yousuf
> > > I agree that usually the waveform at pin is worse than the waveform at
> > die,
> > > especially for Point to Point topology.
> > > However I ever saw the exception in other topology, such as DDR3
> address
> > > bus. Due to the multiple reflection, the waveform at pin is better than
> > > waveform at die.
> > > The waveform at die show stronger ringback than the one at pin.
> sometimes
> > > it will go cross the Vin(DC) at die while perfect good at pin.
> > > This is terrible, because you can't find this problem in the
> measurement.
> > > The only way to find it is the simulation.
> > > Thanks
> > > Feng
> > > --
> > > B.R.
> > > Feng Wu (Ãâ·ã)
> > >
> > > -------------
> > > Signal Integrity Engineer
> > > Cisco Shanghai
> > > -------------
> > >
> > > 2013/8/29 Mustafa Yousuf <yousufs432@xxxxxxxxx>
> > >
> > > > Hi Ted,
> > > >
> > > > In simulation you can probe at both the pin (ball) or pad of the
> memory
> > > > device. The signal would be cleaner at the pad since it is closest to
> > > > termination but at the ball there some reflection involved and that
> > makes
> > > > the signal more noisy.
> > > > You can also probe at the sending device (Tx) pin to make sure the
> > signal,
> > > > the overshoot, undershoot, etc at the Tx are appropriate and within
> the
> > > > device tolerance and so on.
> > > >
> > > > In lab measurements though, you want to probe at the closest point
> you
> > can
> > > > to pin or pad since pin or pad may not be reachable.
> > > >
> > > >
> > > > Regards,
> > > >
> > > > Mustafa
> > > >
> > > >
> > > >
> > > > -----Original Message-----
> > > > From: si-list-bounce@xxxxxxxxxxxxx [mailto:
> > si-list-bounce@xxxxxxxxxxxxx]
> > > > On
> > > > Behalf Of Ted Clark
> > > > Sent: Wednesday, August 28, 2013 8:29 AM
> > > > To: si-list@xxxxxxxxxxxxx
> > > > Subject: [SI-LIST] Measurement point for DDR3
> > > >
> > > > Hi experts,
> > > > I am validating pre-silicon an embedded DDR3 interface with
> > simulation. The
> > > > system is an ASIC connected to a DIMM with an 8 device DIMM.
> > > >
> > > > Where is the appropiate place to probe the simulation for timing and
> > > > voltage
> > > > measurements to check against the JEDEC specifications during a write
> > > > operation?
> > > >
> > > > I can probe either at the ball of the memory device or, since it is a
> > > > simulation, inside the memory package at the pad. The signalling at
> > the pad
> > > > looks cleaner and gives more margin than if I measure at the ball of
> > the
> > > > device.
> > > >
> > > > Cheers,
> > > > Ted
> > > >
> > > >
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