[SI-LIST] Re: Measurement point for DDR3
- From: Feng Wu <wufengthu@xxxxxxxxx>
- To: ted.clark@xxxxxxx
- Date: Mon, 2 Sep 2013 10:06:33 +0800
--
B.R.
Feng Wu (Îâ·ã)
-------------
Signal Integrity Engineer
Cisco Shanghai
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2013/8/28 Ted Clark <ted.clark@xxxxxxx>
> Hi experts,
> I am validating pre-silicon an embedded DDR3 interface with simulation.
> The system is an ASIC connected to a DIMM with an 8 device DIMM.
>
> Where is the appropiate place to probe the simulation for timing and
> voltage measurements to check against the JEDEC specifications during a
> write operation?
>
> I can probe either at the ball of the memory device or, since it is a
> simulation, inside the memory package at the pad. The signalling at the pad
> looks cleaner and gives more margin than if I measure at the ball of the
> device.
>
> Cheers,
> Ted
>
>
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