[SI-LIST] Re: Measurement point for DDR3
- From: "Amit Agrawal (amiagra2)" <amiagra2@xxxxxxxxx>
- To: "<scott@xxxxxxxxxxxxx>" <scott@xxxxxxxxxxxxx>
- Date: Wed, 28 Aug 2013 16:18:26 +0000
Sent from my iPhone
On Aug 28, 2013, at 8:38 AM, "Scott McMorrow" <scott@xxxxxxxxxxxxx> wrote:
> Ted
> DDR3 timing is specified at the pins of the memory device. (I know,
> stupid, but true.) At this ASIC it is wherever you'd like it to be.
>
> regards,
>
> Scott
>
>
> On Wed, Aug 28, 2013 at 11:28 AM, Ted Clark <ted.clark@xxxxxxx> wrote:
>
>> Hi experts,
>> I am validating pre-silicon an embedded DDR3 interface with simulation.
>> The system is an ASIC connected to a DIMM with an 8 device DIMM.
>>
>> Where is the appropiate place to probe the simulation for timing and
>> voltage measurements to check against the JEDEC specifications during a
>> write operation?
>>
>> I can probe either at the ball of the memory device or, since it is a
>> simulation, inside the memory package at the pad. The signalling at the pad
>> looks cleaner and gives more margin than if I measure at the ball of the
>> device.
>>
>> Cheers,
>> Ted
>>
>>
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>
>
> --
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
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