[SI-LIST] Re: IBIS Model Quality (or lack thereof)
- From: "Charlotte &/or Roy Leventhal" <crleventhal@xxxxxxxxx>
- To: <Andrew.Ingraham@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 29 Mar 2002 12:05:34 -0600
All,
I know for a fact that "IBIS models stink" also applied to
data sheets, 2-port models, SPICE and S-parameters at
similar points in their histories having worked with those
entities during their development. Most of those items still
contain a lot of low quality offerings of specific data
sheets, 2-port models, SPICE and S-parameter models.
One "for instance" is a missing or inaccurate diode
resistance in the SPICE model from which (in most instances)
the IBIS model is generated. This results in clamp currents
that are unrealistically high. Sometimes to the billions of
amps as voltage swings out to the -Vcc to +2Vcc extremes.
Garbage in = garbage out. The effect on signal integrity
simulation of reflection is more clamping action than will
be seen in reality. I'm sure that others can think of more
examples.
Conversion from SPICE to IBIS introduces its own chance for
additional mistakes. I think that issue is a legitimate one
to cover in this discussion. I doubt that a discussion of
the merits of SPICE Vs IBIS is a legitimate discussion of
their relative quality. Quality in the sense of number of
errors. The quality/error issue applies across the board to
all technical information provided to users. Instead, I
advocate that a discussion of the merits of SPICE Vs IBIS
can be a beneficial education in application engineering and
the uses of different modeling techniques.
IBIS attempts to do much more, and the same time much less,
than SPICE. Much more in describing entire, often large and
complex, ICs. Much less in avoiding the need to solve what
is going on inside an IO cell. Including what happens
(dynamically) as bias, temperature, etc. change. There is no
sense in arguing the goodness or badness of SPICE Vs IBIS
without a clear understanding of what you are trying to
accomplish. If you need SPICE, use it. I don't suggest SPICE
if you need to scan an entire board of 5,000 nets that can
easily result in upwards of 30,000 simulations, many of very
complex topologies.
You may need to go another modeling technique than IBIS if
you need to dive deeper into physical behavior (table SPICE)
or if you suspect that it really doesn't handle the high
frequency (table S-parameters) analysis well enough. Use
some engineering judgement in doing so. Including, "how
close am I to my design margins?" There is such a thing as
death by analysis.
The issues of availability, completeness and accuracy apply
to all models, data sheets, application notes, etc. Our
culture, particularly the higher decision level ($) culture
in industrial companies, is often not imbued with a passion
to spend money and do well in producing technical
collateral. But, that is a subject for a new/different
thread.
Best Regards,
Roy
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Ingraham,
Andrew
Sent: Thursday, March 28, 2002 3:37 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: IBIS Model Quality (or lack thereof)
> Why use IBIS at all ?
> If you are convinced that IBIS is not good enough (which I
am), don't
> simulate and just follow whatever the vendors design rules
say.
That's fine if you're designing Intel motherboards and have
their
design rules to go by.
But what design rules are there for using a "jelly-bean"
part like
a level translator or a latch? They don't come with any.
Or if you are actually designing a new circuit, not just
copying
someone else's reference design?
Then you get the models that your IC vendors are willing to
give you,
and more often than not, it won't be a SPICE model. Some
even require
you to sign an NDA just to get the IBIS model!
Even the vendors of standard logic ICs that used to have
SPICE
models, don't anymore. It's IBIS, or it's nothing.
One of the big reasons why I hate IBIS, is that many IBIS
models
stink.
My own personal experience that set the tone for this, was a
few years
ago when a vendor refused to provide SPICE models, even
though we
had an NDA, then made us wait 6 weeks while their two IBIS
engineers
created the IBIS model. The model they delivered was so
totally bogus
(keywords misspelled, wrong polarities, MIN and MAX columns
reversed)
that it was obvious they hadn't checked it out on anything.
They claimed it had to be OK because they had sent it to
someone
else for checking before releasing it to us, and that third
party
didn't complain about it.
I spent the next several weeks hand-holding said vendor to
fix their
model for them. (Me, who had neither created nor used an
IBIS model
before!) It took many iterations until they got the model
reasonably
"correct" ... and who knows if it was accurate?!
To this day, whenever I get an IBIS model from an IC vendor,
I need
to check it and often have to fix it before using it. (I
sometimes
need to fix vendor SPICE models too. There seem to be a lot
of
engineers out there who are either stupid or ignorant.)
My most recent IBIS model, which I got directly from a very
large
semiconductor manufacturer (not off a web page), had syntax
errors,
and a major scaling problem. Plus it completely omitted a
major part
of the device's behavior ... thus forcing us to "wing it".
Not all IBIS models stink. There are companies that
specialize in
making them, some of whom do quite a good job. There may
even be IC
vendors who know how to do it. Then there's the rest of the
world,
who it seems couldn't care.
Regards,
Andy
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