[SI-LIST] Re: IBIS Model Quality (or lack thereof)

  • From: "Kevin Fisher" <kfisher@xxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 27 Mar 2002 13:53:36 -0500

All,

The IBIS Qualification Committee has recently been established as an
attempt to improve the quality of IBIS models end-users get from the
semiconductor vendors or third-party model developers provide. The
primary goal of this committee is not to complain about the vendor
supplied IBIS models, but to communicate our needs in terms of quality
to the model suppliers, and to make sure our needs as end-users are met.
Some of the things we hope to accomplish are: to define and document
what is meant by a "high-quality IBIS model", compile a base set of
components required for a quality model, to put processes in place to
help generate and validate quality models, leveraging off the I/O Buffer
Accuracy Handbook and other relevant sources, and look for ways to
improve current industry standard tools to give accurate validation
results on IBIS files exploiting advanced modeling techniques, as is the
case with LDVS and on-die termination.

Representatives from semiconductor vendors who have a customer base for
IBIS models, whether this process is in-house or outsourced, are
encouraged to participate in the IBIS Qualification Committee. We had
our first meeting 1 week ago, and are planning for our second sometime
in the middle of next week. Any individuals interested, please contact
the committee chair, Barry Katz bkatz@xxxxxxxxxxx We look forward to
hearing from you.

Thanks,

Kevin M. Fisher
Consultant
Signal Integrity Software
6 Clock Tower Place, #250
Maynard, MA 01754
(978) 461-0449 Ext. 11

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Todd Westerhoff
Sent: Tuesday, March 26, 2002 5:55 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: IBIS Model Quality (or lack thereof)



Thanks everyone, for your contributions to this thread so far.  By way
of summary, we've heard from the following semiconductor companies:

- Intel
- Fairchild
- Serverworks

(if I left anyone out, my apologies)

... and I'll vouch for both Intel and Micron myself, both in terms of
model quality and support.

It is my strong suspicion that precious few IBIS models are validated in
any meaningful way before they are shipped to the customer.  A few of
your have expressed hopes for the IBIS model quality committee that has
just gotten started, I share your hopes and enthusiasm for the effort.

A number of you have outlined some of the testing processes you use, and
I'd like to suggest that we explore that subject a bit more.  We've
spent a LOT of time here lately correlating IBIS models to their HSpice
counterparts. We're currently using two "standard" text fixtures to
compare IBIS/HSpice
models:

* I/O buffer connected to VDDQ/2 through 50 ohms
* I/O buffer connected to 0.5ns, 50ohm tline, 5pf to GND at tline end

The theory is that the first test fixture compares rising/falling edge
characteristics and buffer strength, while the second test models the
driver's response to a reflected wave (primarily the value of C_Comp).
If you get the HSpice/IBIS buffers to agree across these two tests,
chances are the rest of the puzzle falls into place, provided you agree
on things like pin parasitics and switching thresholds.

So, I'm curious - for those of you who test IBIS models against any kind
of reference (HSpice or measurement) - what kinds of test loads are you
using, and what are you looking for?

As always, all input (on and off the list) is greatly appreciated.

Todd.

Todd Westerhoff
Signal Integrity Engineer
Hammerhead Networks
5 Federal Street - Billerica, MA - 01821 email:twester@xxxxxxxxxxx - ph:
978-671-5084 ============================================

"I'm starting With the man in the mirror
 I'm asking him to change his ways
 And no message could have been any clearer
 If you wanna make the world a better place
 Take a look at yourself, and then make a change"


- "Man in the Mirror", Michael Jackson


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