[SI-LIST] Re: Getting Started
- From: Istvan Novak <istvan.novak@xxxxxxx>
- To: cmaryan@xxxxxxxxxx
- Date: Fri, 24 Apr 2009 21:20:33 -0400
Chris,
Gary's article lists good tools for SI. You could also add SiSoft tools
to the mix, and
for power integrity there are also a number of useful tools at various
sophistication
and price points.
As it was recently pointed out on a similar thread, determining which
tool best fits
a particular need requires the evaluation of a series of criteria. You
may find that
even if we forget about cost, different projects and user backgrounds
may steer
you to different tools. As a starting point, it is important to realize
that for today's
challenging systems there is no such thing as a turn-key design tool.
At best we get
a good analysis tool, possibly with some level of optimization
capability. This
means the user has to come up with the design to be analyzed and the
user has to
know what to change (and how to change) in the design to make it to meet the
requirements.
So your first goal should be to ensure that the necessary knowledge
is available in house to properly use the tools or to be able to
effectively interact with
consultants in case the task is outsourced.
Regards,
Istvan Novak
SUN Microsystems
colin_warwick@xxxxxxxxxxx wrote:
> Hi Chris,
>
> Gary Breed, Editorial Director of High Frequency Electronics magazine, has a
> nice, succinct tutorial entitled "High Speed Digital Design Benefits from
> Recent EDA Tool Developments."
>
> http://bit.ly/gary-breed
>
> The article begins on page 54 of the PDF, which corresponds to the print
> pagination of page 52.
>
> Hth
> -- Colin
> http://signal-integrity-tips.com
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of Chris Maryan
> Sent: Friday, April 24, 2009 5:45 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Getting Started
>
> I recently ran across a project where the power distribution on a
> prototype board was botched, and some SI issues were suspected as well.
> Which got me thinking, how can we prevent this sort of thing in the
> future and get it right the first time? At the moment, our group doesn't
> use any SI or power analysis tools, we've done very well on the basis of
> experience and conservative design.
>
>
> So for all of you out there: what sort of tools should I be looking at
> if I am interested in validating board level power quality and SI? The
> boards are large FPGA based, typically 8-16 layers, with DDR2 layout
> being the main area interest for SI, along with a handful of
> multi-gigabit serial signals. Assume for a moment that things like EMI
> emission and susceptibility and analog circuit noise are (at least for
> the time being) outside of my interest.
>
>
>
> How do I get started?
>
>
>
> Thanks,
>
>
>
> Chris Maryan
>
>
>
>
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