What vertical density do you anticipate and what via technologies do you have
in mind? Have you tried some simple numbers?
For instance, if you assume a hmil (which yields a really low vertical
density!), your limit is 40 mils between adjacent legs of the serpentine. If
you assume a 10-mil via barrel, it may come with a 20-mil pad size. The
assumption is that you started out with a <40mil gap between adjacent legs that
you want to improve by adding ground vias. But by adding a 20-mil pad keepout
for the ground vias makes it even worse. So I don't see how adding stitching
vias could really help in this case...
Regards,
Istvan Novak
Samtec
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> On Behalf Of
Tramp
Sent: Wednesday, July 3, 2019 4:00 PM
To: Scott McMorrow <Scott@xxxxxxxxxxxxx>
Cc: Chris.Cotton@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [EXTERNAL] The gap b/w stitching vias and tline in
serpentine routing
Thanks guys. My intent is to know about the following rules:
When we have to reduce the spacing b/w the parallel segments of serpentine
routing, say from the safe 4h spacing (thanks Scott) down to 3h even 2h, we
may need to add stitching vias along the serpentine traces. Now we get two
questions:
a. When adding the stitching vias, what gap would be best? Here gap means
the distance b/w trace and the ground via.
b. What's the smallest spacing that can achieve similar level of
performance as the 4h spacing, by adding stitching vias?
Sounds some useful questions, arent they?
On Wed, Jul 3, 2019 at 8:25 PM Scott McMorrow
<Scott@xxxxxxxxxxxxx<mailto:Scott@xxxxxxxxxxxxx>> wrote:
To be clear
1) take the maximum single dielectric thickness on either the top or
bottom of the stripline.
2) Multiply that distance by 4
3) This is the minimum clearance required from trace edge to via pad edge
(even if you use non-essential pad removal)
At this distance, the via is essentially invisible to the signal trace.
One member of the Samtec team went through this exercise just this past
month in order to establish our PCB test board design rules.
Scott McMorrow, CTO Signal Integrity Group
Samtec
Office 401-284-1827 | +1-800-726-8329
www.samtec.com<http://www.samtec.com>
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>
<si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>> On
Behalf Of Scott McMorrow
Sent: Wednesday, July 3, 2019 2:21 PM
To: Chris.Cotton@xxxxxxxxxxx<mailto:Chris.Cotton@xxxxxxxxxxx>;
farhilltramper@xxxxxxxxx<mailto:farhilltramper@xxxxxxxxx>;
si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: [EXTERNAL] The gap b/w stitching vias and tline in
serpentine routing
For symmetric stripline a clearance of 4 times the thickness of the
dielectric from trace to plane works from trace edge to via pad edge. This
has been verified through EM modeling with HFSS to 70 GHz
Scott McMorrow, CTO Signal Integrity Group Samtec Office 401-284-1827 |
+1-800-726-8329 www.samtec.com<http://www.samtec.com>
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>
<si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>> On
Behalf Of Cotton, Chris
Sent: Wednesday, July 3, 2019 2:08 PM
To: farhilltramper@xxxxxxxxx<mailto:farhilltramper@xxxxxxxxx>;
si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: [EXTERNAL] The gap b/w stitching vias and tline in
serpentine routing
Hi Tramp,
I think it is difficult to answer your question as there are many missing
details such as frequency of interest, spacing relative to dielectric
height, etc. Also, what kind of SNR are you trying to achieve? Is this a
digital or analog/RF application. Generally for digital applications, if
you have the luxury of sufficient spacing to aggressors then forget the GND
vias and the spacing will suffice.
Best regards,
Chris
From: si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>
<si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>> On
Behalf Of Tramp
Sent: Wednesday, July 3, 2019 7:36 AM
To: si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [EXTERNAL] [SI-LIST] The gap b/w stitching vias and tline in
serpentine routing
[EXTERNAL SENDER: This email originated from outside of Stratus
Technologies. Do not click links or open attachments unless you recognize
the sender and know the content is safe.]
Dear SIlisters,
I did some quick sims sweeping different gaps b/w the stitching ground
vias and tline (Note here the gap refers to the spacing b/w the via and the
tline, not two adjacent ground vias for which I set to twentith lambda)
using 2.5D tool and the results are almost the same. Does anyone have this
experience, such as whether I need to do the sim in 3D, or what distance is
recommended? I saw some implementations put the via at the distance of
merely 4mil while the others do it w/ 20mil. So how on earth is the impact?
--
Best Regards,
Tramp
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