Siddharth The pin starts at the point of contact between the board's solder pad and the IC and continues all the way to but not including the metal on the silicon die. So the pin model in IBIS describes the electrical path from board to silicon. As Lynne points out each pin can have a different path, where Zo, length, coupling, etc. can be different from other pins in the same package. Tom Dagostino Teraspeed Labs 9999 SW Wilshire St. Suite 102 Portland, OR 97225 USA 971-279-5325 Office 971-279-5326 FAX 503-430-1065 Cell tom@xxxxxxxxxxxxx www.teraspeed.com Teraspeed Consulting Group LLC 16 Stormy Brook Road Falmouth, ME 04105 401-284-1827 -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Lynne C. Green Sent: Tuesday, December 11, 2012 8:55 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Determination RLC value of a pin Hello, Siddharth, Not sure I understand your question. Here are some possible answers. Hopefully one of them will help you in your IBIS debugging. - The length between the I/O pad (on chip) and the PCB attach can vary for each pin (history: this was a serious issue for large DIPs). As a rule of thumb, signals in the center of a package have a shorter length (smaller R and L) than signals in the corners. Bond wire length can also vary for each pin. - For flip-chip technology with no package, where the "bump" is the entire interconnect, equal RLC values might make sense. - The RLC values might represent a different package than the one you are using. Regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@xxxxxxxxxxxxxx On 12/11/2012 8:22 PM, Siddharth Rajagopalan wrote: > Dear experts, > I came across some IBIS files for DDR memory where > there are several RLC values for the pins of the same group. For > example, Different pins of DQ group have different RLC values. I was > of the understanding that the geometry of a pin (in this case, a bump > under the > IC) determines the RLC value of that particular pin. Don't these pins > have the same bump geometry. why do we have different values?? Kindly > help me correct my understanding. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu