[SI-LIST] Re: DF spec for PCB materials

  • From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
  • To: "buenos@xxxxxxxxxxx" <buenos@xxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 13 Aug 2012 15:24:47 +0000

I've never seen any other value than 0.035 specified as max Df.  I'm not sure 
what that ridiculous number means - it seems senseless to me.  I pay attention 
to their "typical" values and use the 1GHz value, just to keep it consistent 
(everyone quotes at least a 1GHz value).  Some other notes to control insertion 
loss on PCB constructions:
* When trying to predict relative loss between materials, you might calculate 
sqrt(Er) * Df, rather than only using Df; dielectric loss will be proportional 
to this.
* Be sure to specify either RTF or VLP; you can kill your low-loss material by 
using standard (HTE) copper
    * This may not help you with the microstrip traces - your supplier may 
insist on HTE copper for outer layers.  Some suppliers can use RTF on outer 
layers.
       * Loss on outer layers is very hard to predict/model/control. If 
insertion loss is critical, you'll want to stay on inner layers.  If you do use 
them, be sure to measure and monitor your insertion loss (see note below on 
verifying insertion loss).
* Be sure to not allow aggressive Oxide Alternative (OA) adhesion treatments - 
they can also wreak havoc on your insertion loss.
* You'll want to verify your actual insertion loss meets your expectations.  
Many PCB suppliers are now SET2DIL-capable and can measure the final product 
and report insertion loss (dB/inch) at 4 & 8 GHz.  That will give you assurance 
that something hasn't been introduced that craters your insertion loss.
    * Once you find a "recipe" which meets your insertion loss requirements, 
you'll want to "lock down" that recipe: specify that absolutely no changes are 
allowed unless you go through a requalification effort (measuring insertion 
loss w/ the changes).

I hope this helps,
Jeff Loyer


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Nagy István
Sent: Thursday, August 09, 2012 10:21 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DF spec for PCB materials

Hi, I am trying to select a material for a few projects (small add-in cards as 
well as ATCA) that will support 10GBase-KR 10Gbps and similar signals.The 
better but still non-exotic materials datasheets all state typical DF (loss 
tangent) values around 0.004-0.009, but all say spec value of 0.035 which is a 
lot higher. I am guessing that the spec value may refer to the closest IPC 
slash sheet category?Do you work with typical or spec DF values for your 
~10Gbps board designs?What is the relevance of the two numbers for larger 
series production? Regards,Istvan NagySr. Hardware Development 
EngineerFortinet, Sunnyvale CA
 

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