[SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High speed Signals(SERDES/DDR)
- From: steve weir <weirsi@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 09 Aug 2012 07:42:35 -0700
The first constraint is that the design has to work. If you are going to
make this design work in 10 layers, then you have significant effort in
front of you. The stack-up that you started with does not look like a
good starting point to me. If I were trying to shove 12 layers of stuff
into a 10 layer board I would start with the premise that the board is a
6 outer layer design:
T
G
HS1
x1
x2
x3
x4
HS2
G
B
If the high speed signals will all route with that constraint then I
would work the composition and routing of the remaining four layers to
distribute power and the low speed signals. That strategy may or may not
succeed.
If I couldn't get the HS signals handled with this arrangement, then I
would likely conclude that 10 layers will not be enough.
Steve.
On 8/9/2012 7:17 AM, Prashanth Rajappan wrote:
> Hi All,
> Thanks for the response.I have added more details as per suggestions .In the
> link given below ,basic block diagram and the signal speeds(at max through
> put) have been given.
>
>
> http://flickr.com/gp/84656325@N08/jH23r1
>
> My Layer constraint is 10 Layer.Â
>
> Bill w.r.t in the board ,one power goes to the entire board area hence it
> will take up the enitire power plane .And in the other power plane we would
> require to provide multiple power signals hence splitting the plane.Because
> of that we are not able to give continuous reference to the DDR or any other
> critical signals with one power plane .
>
>
> Also if we dont have much option to spread power over signal layers because
> of the routing space constraints.
>
> Regarding SERDES signals,the tracks can be routed in TOP and Bottom Layers
> .Another issue is the length of SERDES signal tracks .Now the manhattan
> length is coming to 150mm.
>
> Ground pouring,we were planning to pour on top and bottom layers with enough
> spacing from the signals.
> Is it wise to provide ground planes(as much as possible) in signal layers
> also.
>
> Regards
> Prasanth
>
>
>
>
>
>
>
>
>
> ________________________________
> From: Bill Hargin (ICD) <b.hargin@xxxxxxxxxx>
> To: prashanth_rajappan@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Sent: Thursday, 9 August 2012 1:49 AM
> Subject: [SI-LIST] Re: 10 Layer Stackup Recommendation for Board with High
> speed Signals(SERDES/DDR)
>
> Hi Prashanth:
>
> Without having more details, it's probably going to be difficult for someone
> on the outside to provide helpful advice here, but here are some general
> observations.Â
>
> The first thing you need to do is nail down how many routing layers you're
> going to need. It's not clear what you're planning to do with the top and
> bottom layers, or how many layers you need. If you can fit some of your
> SERDES signals on those layers, for example - close to the BGAs - that might
> not be a bad idea.
>
> Once that's determined - e.g., whether you need 4 or 6 signal layers - you
> can start distributing your power and ground planes. It's not a bad idea to
> put ground planes near the surface to avoid coupling between power planes
> and mounting pads on the top and bottom. At the speeds you're working with,
> you might benefit from some power/ground plane capacitance, to pull your PDN
> impedance down at higher frequencies. So, mean 4 or 6 signal layers, your 2
> power planes, plus 2 ground planes ... Something like this:
>
> 4 Signal Layers:Â
> 1 - SIG1 - SERDES / DDR2/High Speed Signals
> 2 - GND
> 3 - POWER1
> 4 - SIG2 - DDR2
> 5 - SIG3 - DDR2 (Pay attn.. to broadside coupling/parallelism on L4-L5.)
> 6 - POWER2
> 7 - GND
> 8 - SIG4 - SERDES / DDR2/High SpeedSignals
> Â
> 6 Signal Layers:Â
> 1 - SIG1 - SERDES / DDR2/High Speed Signals
> 2 - GND
> 3 - POWER1
> 4 - SIG2 - SERDES / DDR2/High SpeedSignals
> 5 - GND
> 6 - SIG3 - DDR2
> 7 - SIG4 - DDR2Â (Pay attn. to broadside coupling/parallelism on L6-L7.)
> 8 - GND
> 9 - SIG5 - SERDES / DDR2/High SpeedSignals
> 10 - POWER2
> 11 - GND
> 12 - SIG6 - SERDES / DDR2/High SpeedSignals
>
> There are eval versions of software that we provide that help with both
> stackup and PDN planning that you may want to play around with. Stackup
> Planning: http://www.icd.com.au/FX.htmlÂ; ;Â PDN Planning:
> http://www.icd.com.au/PDN_Planner.html .
>
> Bill Hargin
> In-Circuit Design, USA
> Software & Services for High-Speed Printed Circuitboard Design
> (425) 301-4425 • b.hargin@xxxxxxxxxx
> Online:Â www.icd.com.au
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> Behalf Of Prashanth Rajappan
> Sent: Wednesday, August 08, 2012 6:33 AM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] 10 Layer Stackup Recommendation for Board with High speed
> Signals(SERDES/DDR)
>
> Hi All,
> I am looking for suggestions for our PCB which has high speed interfaces
> like SERDES /DDR2/GIGA BIT Ethernet.The current stackup is given below.
>
> Top
> GND
> SIG1 - SERDES / DDR2/High Speed Signals
> SIG2 - DDR2
> POWER1
> GND
> SIG3 - DDR2
> SIG4 - SERDES / DDR2/High SpeedSignals
> POWER2
> BOT
>
> PLease let me know your comments or suggestion regarding the same.
>
> Thank you in advance!
>
>
> Regards
> Prasanth
>
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