[SI-LIST] Re: DDR3 Signal Quality & Timing Analysis - Probe Location at DRAM - Pin or Die?
- From: "Pugazharasan Selvanathan - ERS, HCL Tech" <pugazharasan.s@xxxxxxx>
- To: "hermann.ruckerbauer@xxxxxxxxxxxxx" <hermann.ruckerbauer@xxxxxxxxxxxxx>, "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 31 Oct 2011 19:21:29 +0530
Hello Hermann,
Thanks for your ideas. I absolutely agree with all your points.
I simulated with different end termination values for DDR3 clock. Currently the
parallel termination value is set at 49.9 ohms. Reducing the termination value
improves the signal quality at all DRAMs, even at die. However, I will do
careful analysis in obtaining good clock signal at all DRAMs.
Like you said, fly-by topology requires careful optimization, simulation and
verification.
Thanks,
Pugazh
-----Original Message-----
From: Hermann Ruckerbauer [mailto:hermann.ruckerbauer@xxxxxxxxxxxxx]
Sent: Monday, October 31, 2011 4:36 PM
To: si-list@xxxxxxxxxxxxx; Pugazharasan Selvanathan - ERS, HCL Tech
Subject: Re: [SI-LIST] DDR3 Signal Quality & Timing Analysis - Probe Location
at DRAM - Pin or Die?
Hello,
the flyby CA bus on DDR3 needs careful optimization.
Each DRAM is causing a little bit of reflections, and in worst case
these overly on one DRAM position.
What I find interesting: Often the waveshape at the die is better than
at the pin ...
Nevertheless here what is possible:
- Optimize the loaded transmissionline part between the DRAMs. This is
dependent on the distances between the DRAMs, the corresponding
impedances (maybe even two different between the devices) and the input
capacitance of the DRAMS.
- Optimize the leadin Length of the Clock: if you have bad luck it is an
reflection of the controller that hits you at the first DRAM
- Optimize the length of low and high impedance routing (in the LeadIn,
and maybe even between the DRAMs).
- Optimize the clock termination at the end (length and value)
- minimize the stub length going go each DRAM component.
- Change the via arrangement for the clock
The improve ment down the line is not really because the length to the
termination decreases. Dependent on the Layout/design it is possible
that each of the DRAMs along the bus can see the worst case of overlay
of any reflections. Nevertheless often it is the first one which is
getting the worst case.
So I guess all I can tell is, that the design of the DDR3 Flyby bus is
difficult and needs to be done very carefully. We have done some designs
just by copy an existing Design to a new environment, but this is
dangerous ..
So best what you can do is to take your simulator and check what you can
change to optimize the SI ...
Best regards
Hermann
Our next Events:
================
Signal Ingegrity Seminar "Open the Black Box of Signal Integrity"
at TH Aalen on 29th October 2011
Visit us on Embedded World 2012
Our location Hall 1 / Booth 509
Check our website or contact us for details
EKH - EyeKnowHow
Hermann Ruckerbauer
www.EyeKnowHow.de
Hermann.Ruckerbauer@xxxxxxxxxxxxx
Veilchenstrasse 1
94554 Moos
Tel.: +49 (0)9938 / 902 083
Mobile: +49 (0)176 / 787 787 77
Fax: +49 (0)3212 / 121 9008
schrieb Pugazharasan Selvanathan - ERS, HCL Tech:
> Hello everyone,
> My observations from the simulation results of a DDR3 interface (64 bit + 8
> bit ECC) with five Micron DRAMs:
>
> In FAST corner, when CLK is probed at PIN of first DRAM in the daisy chain,
> it has good signal quality (monotonic, no DC/Vref multi-crossing). But if it
> is probed at DIE of the same DRAM, CLK is non-monotonic, multi-crosses DC and
> Vref thresholds. Signal Quality improves at die of the other DRAMs as we
> progress down the daisy chain, since the stub length between respective DRAMs
> and termination decreases.
>
> Give your thoughts to improve the signal quality at first DRAM's die.
> Currently, the output impedance of DDR3 Controller is set to 40ohms, which is
> the maximum O/P impedance it supports.
>
> Thanks,
> Pugazharasan Selvanathan
> Member Technical Staff - Design Centric Services
> HCL Technologies Ltd.
> #94, South Phase, Ambatur Industrial Estate, Chennai-600058
> Tel: +91-44-66892000 Extn: (2695)
> www.hcl.com<http://www.hcl.com/>
>
>
> ________________________________
> ::DISCLAIMER::
> -----------------------------------------------------------------------------------------------------------------------
>
> The contents of this e-mail and any attachment(s) are confidential and
> intended for the named recipient(s) only.
> It shall not attach any liability on the originator or HCL or its affiliates.
> Any views or opinions presented in
> this email are solely those of the author and may not necessarily reflect the
> opinions of HCL or its affiliates.
> Any form of reproduction, dissemination, copying, disclosure, modification,
> distribution and / or publication of
> this message without the prior written consent of the author of this e-mail
> is strictly prohibited. If you have
> received this email in error please delete it and notify the sender
> immediately. Before opening any mail and
> attachments please check them for viruses and defect.
>
> -----------------------------------------------------------------------------------------------------------------------
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>
> List technical documents are available at:
> http://www.si-list.net
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
>
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List technical documents are available at:
http://www.si-list.net
List archives are viewable at:
//www.freelists.org/archives/si-list
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
