[SI-LIST] Re: DDR interface
- From: "zheng qi" <qzheng.hb@xxxxxxxxx>
- To: AlexLi@xxxxxxxxxxxx
- Date: Wed, 27 Sep 2006 10:39:11 +0800
hi
I think ck and dqs belong to different clock domin
.so match them does really meaningful ???
2006/9/27, Alex Li <AlexLi@xxxxxxxxxxxx>:
> Hi, Edi:
> On DDR layout, you can routing DQS/DQ(DM)/Clock with same lengrh.
> =20
> On DDR2 layout, you can routing DQS and Clock with same length.
> But data and data mask must be shorter than DQS
> =20
> B.R.
> Alex Li
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Fraiman, Edi
> Sent: Tuesday, September 26, 2006 9:50 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] DDR interface
>
> Hi all,
>
> I have question about DDR interface layout.
> I understand that during PCB layout the DQS (data strobe) should be
> routed with same length as DQ (data), DQM signals and
> Address bus and control signals (RAS,CAS, CKE,WE,CS) should be aligned
> to clock.
> But I do not understand what relationship (what the maximum difference
> in length) between DQS and CLOCK.
> Could you please advise?
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
