[SI-LIST] Re: 6 layers stackup
- From: David Instone <dave.instone@xxxxxxxxxx>
- To: Saoer Sinaga <saoer.sinaga@xxxxxxxxx>
- Date: Thu, 24 Apr 2008 09:35:28 +0100
I think your question is 'why have the G layer nearest the top of the
board rather than the P layer?' Probably because the chips are
generally on the top side of the board and having the the G layer
nearest means your hi-speed racks can reference G rather than P without
needing vias. Of course with a good decoupling referencing P rather
than G might not be a problem, see previous threads on this list re
referencing G or P. However, the G layer is generally one complete area
over the board while the P layer must often be split into sections for
different voltages; giving rise to problems where signal traces have to
cross the splits
Regards
Dave Instone
+44 (0)1235 824963
OXFORD SEMICONDUCTOR LIMITED
25 MILTON PARK
ABINGDON
OXFORDSHIRE
OX14 4SH
Registered in England no 2733820
Registered Address: As above
Saoer Sinaga wrote:
> Dear all,
> May I know the reason why people would generally use S1 S2 G P S3 S4
> configuration for six-layer stackup? Why not S1 S2 P G S3 S4?
> Thanks.
>
> regards,
> Saoer
>
> On Wed, Feb 20, 2008 at 11:17 PM, Fernando Yuitiro Mori <mori@xxxxxxxxxxxxx>
> wrote:
>
>
>> Hi,
>> I normally use S1 S2 G P S3 S4 for the 6 layers stackup. I need the 4
>> layer with 60 ohms, so there are some problem if I use S1 G S2 S3 P S4?
>>
>> Regards,
>>
>> Fernando Mori
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