There was an article written about controlled impedance vias several years ago by Thomas Neu of Texas Instruments. I haven't seen any followup articles by anyone on the subject since. You can read Neu's article online at: http://www.edn.com/index.asp?layout=article&articleid=CA324403 . Others may have experienced different results, but I've never found controlled impedance vias to be necessary or useful. The distances involved in a via are so short that any pretense of matching impedance is negligible compared with other variations that you might encounter over the full length of a signal path. One board we built for a customer provided two signal paths, one with Neu's controlled impedance vias, and duplicates without. Testing of the loaded board showed no appreciable difference in performance, and the loss of board space to the structure necessary to achieve the controlled impedance vias was considerable. Regards - Harry At 05:51 PM 1/9/2008, you wrote: >Is there such a thing as a design methodology for designing a PCB via with >50 ohm impedance, or does it have to be done iteratively using a 3D field >solver? >Are controlled impedance vias necessary, worthwhile or helpful for >multi-gigabit serial links running at 1 to 5 Gbps? > > > >Thanks - Joel ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu