[SI-LIST] Re: Tightly coupled VS loosely coupled diff pairs
- From: "Degerstrom, Michael J." <degerstrom.michael@xxxxxxxx>
- To: MikonCons@xxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Thu, 13 Sep 2001 11:16:31 -0500
Mr. Conn,
Could I please get clarifications on some of your statements? Here
I've taken exerpts from several of your recent postings.
>Losses: Because the degree of coupling is not major (i.e., typically 15%)
for
>"closely" coupled traces, the bulk of the current still flows in adjacent
>reference planes and the added losses are minor. In some cases, one might
>prefer the added high frequency (i.e., harmonics) attenuation to soften the
>edges.
>
>I use tightly coupled trace pairs within the limits of the vendor's
>manufacturing process to the maximum extent practical.
'Within the limits' could be interpreted very differently than
'close to the limits'. I'm guessing that you are using line
widths of 6-8 mils so that conductor losses are not too great.
I would think that even manufacturers of large back planes wouldn't
have a problem with a 6 mil spacing. For smaller boards a 4-5
mil spacing is comfortably achievable by most shops. So lets just
assume an 8 mil wide line with a 6 mil spacing. It would require
a laminate thickness of ~ 12mils above and below a edge-coupled
stripline to achieve Zdiff=100. At 24 mils dielectric thickness
per stripline you would be very limited on the number of routes
you could get off or across your board. This assumes Er=3.5 which
can be achieved only with the high speed laminates. No matter
what the definition of coupling is, the stripline I described would
have a much greater than 15% degree of coupling. Incidentally, what
is your definition of the degree of coupling?
I'm still not clear as to what you attribute the high frequency attenuation
that you mention above? Is it dispersion between the t/c pair or
some other reason? If the former, can you describe the mechanism
further?
>As I'm sure you are aware, edge rate degradation for any line configuration
>is partially dependent on the losses of the harmonics of the fundamental.
>That degradation is universal and must be dealt with in all designs.
However,
>a potentially greater impact on edge rate occurs because of different
delays
>of the signal propagation on each of the two traces of a differential pair.
>The edge rate degradation is 1/2 the difference in propagation delays
>(originating from whatever source). Closer routing (and therefore tighter
>coupling) of traces minimizes this delta in two ways; viz, minimization of
>physical length differences and different effective dielectric values
caused
>by localized glass-resin variations in the core and pre-preg layups. More
>tightly coupled traces minimize both effects. Note that the localized
>variations in effective dielectric constant are near impossible to model,
>even for one board vendor with a known material source and a given stackup.
>These variations will vary from board to board even within one lot.
Typically, I think any experienced SI designer would never send
out a differential design without coupling the t/c pair close together.
Layout designers are apt to not couple the lines closely as it is easier
to match the physical lengths of the line when they are not coupled closely.
However, the electrical lengths are not necessarily matched when
compared with closely coupled pairs for the reasons that you mention
above. Supposedly, the high speed materials have fibers with a
much lower dielectric constant which matches better to the resin. This
should reduce the localized variations.
>Another major contributor in edge rate degradation is non-symmetrical
>coupling to adjacent signal traces and pins in connector pin fields.
This is true for non-symmetrical coupling in the pin fields and also
anywhere else along the entire t/c pair path. One added benefit
for tighter t/c coupling is that the signals are spaced further
from other lines, vias, etc. that contribute to asymmetric coupling.
>Second item: Unfortunately, one invariably gets into trouble by assuming
>anything is "always right." I have found that maintaining the accuracy of
the
>differential impedance is most beneficial for CML systems. For
complimentary,
>single-ended logic systems, the clocks are generally (inherently) slower
>because the unbalanced technology is more susceptible to parasitics,
unequal
>transition slew rates, induced supply ripple, etcetera. As a consequence,
the
>tight matching of even and odd impedances you question above is of less
>importance. If you are pushing to the higher speeds, I recommend you look
to
>balanced CML technology which better tolerates fluctions in even-mode
signals
>and responds more accurately to the differential signal.
I'm glad you injected the distinction that complimentary single-ended system
are less susceptible to imbalance primarily because they are going SLOWER
than your high speed true differential designs. Basically, it is
difficult for high speed differential drivers to absorb reflections
that are not differential. Even if the driver is designed to impedance
match both even and odd modes, in a practical sense, the driver combined
with the package inductances will not be able to provide an impedance
match for the high frequency components of the non-balanced reflections.
This does contribute to ISI but it is probably much better that the output
buffer designs try to absorb the even mode noise rather than ignore
the impedance matching entirely. It does get to be a trade-off with
power consumed and cost of the higher performing packages as examples.
Mike
_______________________________________________________________
Mike Degerstrom Email: degerstrom.michael@xxxxxxxx
Mayo Clinic; 200 1st Street SW ; Rochester, MN 55905
Phone: (507) 538-5462 FAX: (507) 284-9171
WWW: http://www.mayo.edu/sppdg/sppdg_home_page.html
_______________________________________________________________
> -----Original Message-----
> From: MikonCons@xxxxxxx [mailto:MikonCons@xxxxxxx]
> Sent: Wednesday, September 12, 2001 3:38 PM
> To: hali@xxxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Tightly coupled VS loosely coupled diff pairs
>
>
> In a message dated 9/10/01 4:04:36 PM Pacific Daylight Time,
> hali@xxxxxxxxxxxxxx writes:
>
>
> > Some folks claim that loose coupling is better because it
> results in less
> > reflection due to intra-pair trace spacing changes (hence impedance
> > mismatches) in connector pin fields, in device break-out
> area and associated
> > vias. You didn't say much about that. Just wondering, have you ever
> > quantified that particular reflection effect?
> >
> > Around the same impedance matching issue, is it not the
> case that in some
> > applications there is a need to tightly match both single-ended and
> > differential impedances? If that is the case, is it then
> always right that
> > tight coupling is better than loose coupling?
> >
>
> Ali:
>
> First item: Where the trace pairs split upon entering the
> connector pin
> fields, there are two options; viz, the traces can be widened
> to maintain the
> differential impedance or the trace width can be maintained
> and balanced
> against the parasitic capacitance of the pin through-hole to
> achieve Zo
> continuity. For critical (>2 GBPS) lines, I combine both
> techniques in the
> pin field, depending on how far the penetration into the
> field. This takes a
> reasonable modeling effort to accomplish, but I like to make
> SI a "non-issue"
> for cutting-edge designs.
>
> Second item: Unfortunately, one invariably gets into trouble
> by assuming
> anything is "always right." I have found that maintaining the
> accuracy of the
> differential impedance is most beneficial for CML systems.
> For complimentary,
> single-ended logic systems, the clocks are generally
> (inherently) slower
> because the unbalanced technology is more susceptible to
> parasitics, unequal
> transition slew rates, induced supply ripple, etcetera. As a
> consequence, the
> tight matching of even and odd impedances you question above
> is of less
> importance. If you are pushing to the higher speeds, I
> recommend you look to
> balanced CML technology which better tolerates fluctions in
> even-mode signals
> and responds more accurately to the differential signal.
>
> Mike
>
> Michael L. Conn
> Owner/Principal Consultant
> Mikon Consulting
> (408)727-5697
>
> *** Serving Your Needs with technical Excellence ***
>
>
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