[SI-LIST] Re: Plane breaks - Presentation download
- From: steve weir <weirsp@xxxxxxxxxx>
- To: ron@xxxxxxxxxxx, "Grasso, Charles" <Charles.Grasso@xxxxxxxxxxxx>
- Date: Mon, 24 Jan 2005 07:50:48 -0800
Ron, I have to disagree a bit there too. A single differential pair will
definitely fare an order of magnitude better crossing a slot, but any
common mode energy from the net pair still excites the slot for EMC
purposes and coupling shift from the 10% range up to the 30% range still
presents an impedance discontinuity. Here, shrinking the gap to be a small
fraction of Tr would seem to cause the least impairment.
Regards,
Steve
At 07:13 AM 1/24/2005 -0800, Ron Miller wrote:
>For a diff pair it is not so much of a problem because there is coupling
>from both
>legs and they can be very tightly coupled, so the coupling into the slot
>is balanced
>and cancels.
>
>The problem is primarily with single traces.
>
>Ron
>
>Grasso, Charles wrote:
>>
>>Steve/Ron - Just to calibrate myself ... Now you DO
>>mean a trace crossing a split orthogonally right?
>>If so I fail to see how changing the width of the
>>split makes things better except maybe in one condition.
>>i.e. where a diff pair cross a split. The return current
>>for one trace will be carried by its pair and the split will
>>be almost invisible.
>>
>>The effect of crossing a split on a diff pair
>>can be seen in a presentation by Ansoft Corp
>>available for download from the RMCEMC website.
>>Go to <http://www.ieee.org/rmcemc>http://www.ieee.org/rmcemc the link is
>>on the front page. You'll need to go in about 12
>>pages or so...
>>
>>Best Regards
>>Charles Grasso
>>Senior Compliance Engineer
>>Echostar Communications Corp.
>>Tel: 303-706-5467
>>Fax: 303-799-6222
>>Cell: 303-204-2974
>>Pager/Short Message: <mailto:3032042974@xxxxxxxx>3032042974@xxxxxxxx
>>Email: <mailto:charles.grasso@xxxxxxxxxxxx>charles.grasso@xxxxxxxxxxxx;
>>Email Alternate: <mailto:chasgrasso@xxxxxxxx>chasgrasso@xxxxxxxx
>>
>>
>>
>>-----Original Message-----
>>From: steve weir [<mailto:weirsp@xxxxxxxxxx>mailto:weirsp@xxxxxxxxxx]
>>Sent: Saturday, January 22, 2005 4:19 PM
>>To: <mailto:ron@xxxxxxxxxxx>ron@xxxxxxxxxxx;
>><mailto:Chris.Cheng@xxxxxxxxxxxx>Chris.Cheng@xxxxxxxxxxxx
>>Cc: Si-List
>>Subject: [SI-LIST] Re: risetime effects of plane breaks
>>
>>
>>Ron,
>>
>>Do you really mean to imply that the cross-talk falls substantially if the
>>slot gap is increased to 2H or more? That is a new and very
>>counterintuitive notion to me. I would be very interested in seeing any
>>A/B model that could demonstrate such a phenomena.
>>
>>Regards,
>>
>>
>>Steve.
>>
>>At 10:13 PM 1/21/2005 -0800, <mailto:ron@xxxxxxxxxxx>ron@xxxxxxxxxxx wrote:
>>
>>>
>>>A few years ago Intel discovered that when a trace crosses a split it
>>>can excite a transmission line mode into the slot between the panes
>>>called "slot line" strangely enough. If the gap is small
>>>it works quite well and all the traces crossing it become cross-talk for
>>>one another.
>>>
>>>To avoid it make the gap at least 2 or 3 times the thickness of the
>>>dielectric.
>>>
>>>ADS (Agilent) has a model for slot lines with the other transmission
>>>lines.
>>>
>>>Ron
>>>
>>>Chris Cheng wrote:
>>>
>>>
>>>>
>>>>Scott,
>>>>Excellent summary. That was my concern on striplines crossing with a
>>>>bus rather than individual signals. In a way, it is like wire bond
>>>>signal leads without the ground leads mixed among them. The signals
>>>>start referencing each other instead. Or you can see it as a
>>>>trade-off between adding shielding layers or spreading the bus
>>>>spacing (decreasing routing channels) in a high density/performance
>>>>design. My own rule of thumb is space them at least equal or larger
>>>>than the gap itself when crossing. That's is at least a 3x decrease
>>>>in routing channels so it is quite costly and has to be weight
>>>>against adding shielding layers. Sometimes its worth it, sometimes
>>>>its not. As for EMI, if you dig back some discussion I had with
>>>>Steve, I always prefer solid ground planes referencing microstrips on
>>>>top and bottom of PCB and then stitch the edges with ground vias.
>>>>Hopefully any of those excited noise on the cut power planes will be
>>>>trapped inside.
>>>>
>>>>-----Original Message-----
>>>>From: Scott McMorrow
>>>>[<mailto:scott@xxxxxxxxxxxxx>mailto:scott@xxxxxxxxxxxxx]
>>>>Sent: Thursday, January 20, 2005 2:39 PM
>>>>Cc: Si-List
>>>>Subject: [SI-LIST] Re: risetime effects of plane breaks
>>>>
>>>>
>>>>When this thread started I was on vacation. However, I found this
>>>>interesting enough to resurrect some previous simulations I'd
>>>>performed in CST Microwave Studio. After much playing, twiddling and
>>>>generally having fun I can say several things:
>>>>1) It's pretty easy to confirm Doug's results using 3D fullwave
>>>>simulation. In fact, in about 30 minutes I can replicate his case and
>>>>create a design that can be easily modified for many other
>>>>possibilites. The microstrip split plane crossing is a no-brainer.
>>>>Just don't do it and expect anything approaching an EMI "clean"
>>>>system.
>>>>
>>>>2) Chris and Steve ... and eventually myself, wanted to know more
>>>>about the various different stripline plane crossing configurations,
>>>>so I setup a simulation with a VDD island not unlike what might be
>>>>found in a memory system, and performed multiple simulations with
>>>>dual asymmeteric stripline crossing the plane twice on it's way to
>>>>the memory module. Not surprisingly the following is true:
>>>>
>>>> It is best not to cross a split plane ... even with stripline.
>>>> If you do, it is better to cross a split that is adjacent to a
>>>> ground plane
>>>> It is even better if you cross a split adjacent to a ground plane on
>>>> the stripline layer furthest away from the split plane (i.e. next to
>>>> a ground plane)
>>>> It is worst to cross a split plane that has no adjacent ground.
>>>> The width of the gap in the plane makes very little difference until
>>>> it becomes really small or really big.
>>>> Crosstalk scales almost linearly with the number of aggressors
>>>> crossing the split. (i.e. - it can get really bad!)
>>>> Bypass of the split power island helps for frequencies below 500
>>>> MHz, provides no help for frequencies higher than 500 MHz, and as
>>>> such has no benefit to most of the noise and crosstalk created by
>>>> high speed signals crossing onto and off of the island.
>>>>
>>>>The energy released into the power/ground plane cavities by high
>>>>speed signal split plane crossings is huge and essentially cannot be
>>>>suppressed with bypass capacitors. Any attempt at supprerssion with
>>>>capacitors exhibits what I call a "Whack-A-Mole" property. You can
>>>>never get rid of those pesky little moles. All you can do is to move
>>>>them around by thumping them. Given that all this energy is rattling
>>>>around the PCB power planes from split plane crossings, it will
>>>>eventually go somewhere. Since it's really easy to develop all sorts
>>>>of resonant power island cavities that have primary resonant
>>>>frequencies in the 500 MHz to several GHz range, it is not at all
>>>>unlikely that any split plane crossing has an extremely strong
>>>>potential to excite a resonance in a frequency range that will cause
>>>>most systems to fail EMC compliance testing About all you can do is
>>>>to shield the cavity patches using ground layers. This should reduce
>>>>the radiated energy significantly, but will not totally eliminate it,
>>>>since eventually it will find it's way to all those pesky device and
>>>>package leads.
>>>>
>>>>
>>>>best regards,
>>>>
>>>>Scott
>>>>
>>>>
>>>>
>>>>
>>>
>>>
>>>--
>>>Ronald Miller
>>>Ghz Data, Signal Integrity Consulting
>>>7721 Sunset Ave.
>>>Newark CA 94560
>>>tel 510-793-4744
>>>cell 510-377-9380
>>>fax 510-742-6686
>>><http://www.ghzdata.com>www.ghzdata.com
>>>
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>
>
>--
>Ronald B. Miller, Microwave/SI Engineer RAIL = NOISE + REFLECTIONS
>Gigahertz Data Div of MI Corp. \\ // \\ //
>7180 Thornton Avenue \\// \\//
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