[SI-LIST] Noise on BGA core voltage rail
- From: Anand.Kuriakose@xxxxxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 8 Aug 2002 22:06:59 +0630
Hi,
Heres a situation where i have a BGA (chipset with interface to processor, DDR
memory and other high speed proprietry buses) with sufficient decoupling
sprinkled around the BGA. The decoupling on the core voltage rail (2.5V, which
is also the I/O voltage for DDR interface) basically consists of 2 high value
bulk capacitors, six 1uf caps, ten each of 0.1uF and 0.01uF caps. I am noticing
noise around 150mv of noise during activity on the DDR (using software
utilities) and roughly 80-100 mV during almost no activity across the chip.
This amplitude is significantly more than the noise noticed at other high speed
chips on the board. Using the FFT function on the DSO, i figured out that the
frequencies where it peaks are 200Mhz and integral multiples of 200Mhz.
I tried a couple of things:
1> Since i am seeing peaks at 200Mhz and its integral multiples, i thought
that there could be insufficient high frequency decoupling and hence i replace
the 0.1uF caps with 1000pF caps.
2> Secondly, fearing that there could be some resonance happening due the
different values of caps used, i replaced all the 0.1 uF caps with 0.01uF caps
(in addition to existing 0.01uF caps).
Both the above strategies failed to reduce the noise. There was no change in the
amplitude of the noise and also the frequencies where peaks were noticed.
Can somebody out there throw some light on what is lacking in the strategies
mentioned above and how to reduce this noise satisfactorily.
Thanx in advance.
Anand.
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