[SI-LIST] Re: DDR-1 termination (short point-to-point)
- From: "Novak David (TTE)" <david.novak@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 4 Feb 2005 17:00:08 -0500
From a Micron datasheet:
1.5V shoots are allowed as long as they are less than 3ns and shorter
than 1/3 the clock period.
DC Operating conditions for VDD: 2.3V to 2.7V (nominal 2.5V)
Absolute max for VDD: -1V to 3.6V
This spec'd absolute max seems to help prove your theory. The absolute
max extents are about 1V beyond nominal. Does this mean that the
protection diodes don't turn on until the signal is roughly 500mV beyond
VDD's absolute max (hence the 1.5V shoot spec.)?
If I understand you correctly, you are saying that this feature must be
specifically added to the IC and it cannot be assumed that all ICs can
handle shoots this large. Correct? I have often wondered if all ICs
could handle these shoots and the DDR manufacturers simply did a more
thorough job of specifying their parts.
David
-----Original Message-----
From: Dennis Han [mailto:Dennis.Han@xxxxxxxxxxx]=20
Sent: Friday, February 04, 2005 4:06 PM
To: Novak David (TTE)
Subject: Re: [SI-LIST] Re: DDR-1 termination (short point-to-point)
The diodes are Schottky, so they turn on at VDD + 0.4 V and VSS - 0.4 V.
I am not familiar with DDRs, but my guess is they were designed to
tolerate transients that big and the input FETs have a limitation that
limits the overshoot to 1.5 V. This limitation may be true for all CMOS
ICs fabed with the process used for DDRs. Are the maximum VDD and
minimum VSS roughly 1.5 V beyond nominal? Probably, especially if
nominals are 2.5 V and 0 V, so the max VDD is 4.0 V and the min VSS is
-1.5 V.
Dennis
----- Original Message -----
From: "Novak David (TTE)" <david.novak@xxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Friday, February 04, 2005 2:49 PM
Subject: [SI-LIST] Re: DDR-1 termination (short point-to-point)
> That begs the question, what is different about DDR that allows a 1.5V
> shoot spec? Are the protection diodes in these devices somehow
different
> from typical ICs?
>
> When you say that the diode would be on at 400mV, do you mean that it
> would begin turning on at that point?=3D20
>
> David=3D20
>
> -----Original Message-----
> From: Dennis Han [mailto:Dennis.Han@xxxxxxxxxxx]=3D20
> Sent: Friday, February 04, 2005 3:42 PM
> To: Novak David (TTE); si-list@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] Re: DDR-1 termination (short point-to-point)
>
> How much overshoot an IC can handle is usually a function of the
> protection diodes in the IC. Turning these on constantly adds power
to
> the IC and it adds transients to the IC's power and ground planes. It
> is best to keep the diodes off. That is probably why the spec is 300
> mV. 400 mV would have the diode turned on.
>
> Dennis
>
> ----- Original Message -----
> From: "Novak David (TTE)" <david.novak@xxxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Sent: Friday, February 04, 2005 12:45 PM
> Subject: [SI-LIST] Re: DDR-1 termination (short point-to-point)
>
>
>> Yes, but most memory controllers spec. a 300mV(max) for 'shoots.
>>
>> The interesting question here is how real is that 300mV spec? If the
> DDR
>> can handle more, why can't the memory controller?
>>
>> David=3D3D20
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
>> On Behalf Of Landrum, Chris
>> Sent: Friday, February 04, 2005 12:03 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: DDR-1 termination (short point-to-point)
>>
>> Doesn't DDR1 allow for overshoot/undershoot up to 1.5V as long as it
> is
>> for a short period of time (500pS or so)?=3D3D3D20
>>
>> -Chris
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
>> On Behalf Of Novak David (TTE)
>> Sent: Friday, February 04, 2005 10:18 AM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: DDR-1 termination (short point-to-point)
>>
>> The DDR will never be a "slow drive". However, the x32 GDDR parts do
>> allow more control over drive strength.
>>
>> As long as you keep the lines short, you should have no problems with
> a
>> simple series resistor in each line. This is a very common
termination
>> scheme for point-to-point DDR designs.
>>
>> If it were not for the 300mV overshoot specs. on most DDR memory
>> controllers, you wouldn't even need the series resistors.
>>
>> David
>>
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
>> On Behalf Of Anders Frederiksen
>> Sent: Thursday, February 03, 2005 5:00 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] DDR-1 termination (short point-to-point)
>>
>>
>> I'm connecting a lot of DDR1 ram to a FPGA (Virtex2pro). Common
> schemes
>> recommended is "embedding a DIMM design" (which would be plain stupid
>> imho) and doing a full parallel termination in both ends (typically
in
>> 0402). The latter is naturally sensible - but it occurs to be kind of
> a
>> overkill for ponit-to-point lines of "only" 5cm (~2") or less. Has
>> anyone experience with simpler termination schemes? I mean for
> standard
>> busses one would rely on slow drivers only...
>>
>> Cheers,
>> Anders
>>
>>
>>
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>>=3D20
>
>
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