[PCB_FORUM] Re: System requirements for 15.2
- From: "Dave Mattice" <DMattice@xxxxxxxxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Thu, 19 May 2005 16:06:28 -0700
Similar problem here. And not to mention trying to
Add a final test point or two.... That could take 10
Or 15 minutes.
I have finally resorted to "disabling" my dynamic fill and totally
Moving the plane layers off the board. I know that sucks but it does help to
Improve the response time. Try moving just the ground planes off and see
What kind of increase in response time you get. I think you will be surprised.
Our typical cards have four ground planes and getting those off the routing area
Increase the response time.
Yes this sucks.
Cadence, are you monitoring this?
Please?
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx]On Behalf Of Paul_Keefe@xxxxxxx
Sent: Thursday, May 19, 2005 3:06 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: System requirements for 15.2
I have a single 2.8 ghz with 2 gb of memory and two 21" monitors in my
office laying out similar boards with
900 "matched" diff pairs and many positive shapes. The lag between my home 1ghz
/ 1gb of memory is so bad
that I spend more time in work. I don't really wait to often but I also try to
add the planes in at the end of the layout.
The dual monitor setup is so good I'll never go back to just one. Whether using
CM to highlight nets, groups
or Concept to crossprobe between it and Allegro. We started with one 21" and an
old 17" monitor and liked it so much
we invested in another 21".
Paul Keefe
george.h.patrick@xxxxxxxxxxxxxx
Sent by: icu-pcb-forum-bounce@xxxxxxxxxxxxx
05/19/2005 05:44 PM
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[PCB_FORUM] Re: System requirements for 15.2
I have a dual 2.66 GHz Xeons w/ 2 GB of memory. I still get lags on large
boards with lots of planes. I am going to try 3 GB of memory (the most I can
stick in it), but there was almost NO improvement from 1 GB to 2, so I don't
think that's going to help :(
There are some differential pairs that have a 20 second lag in them from the
time I start sliding to the time they actually move.
Sure would be nice if Cadence would multi-thread Allegro so it could actually
USE both processors. It's going to get worse as Intel switches to multi-core
processors instead of increasing bus speeds.
--
George Patrick
Tektronix, Inc.
Central Engineering, PCB Design Group
P.O. Box 500, M/S 39-512
Beaverton, OR 97077-0001
Phone: 503-627-5272 Fax: 503-627-5587 <http://www.tektronix.com/>
http://www.tektronix.com <http://www.pcb-designer.com/>
http://www.pcb-designer.com
It's my opinion, not Tektronix'
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Sawyer Jayne
Sent: Thursday, May 19, 2005 14:34
To: icu-pcb-forum@xxxxxxxxxxxxx
Cc: Anderson Gary; Cech Charles
Subject: [PCB_FORUM] System requirements for 15.2
Since moving to 15.2 and positive planes we have been experiencing considerable
lag time when running DRC, using the electrical constraints for diff pairs or
doing edits to the planes.
The boards we are having issue with are
17" X 14"
16 layers
23477 connects
24000 via
We are looking to upgrading our hardware. I am hoping that some one in the
group might be working with similar conditions and already have updated to a
machine that could handle it. If any one can help me to spec a capable machine
please let me know.
Thanks in advance,
Jayne Sawyer
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