[PCB_FORUM] Re: System requirements for 15.2
- From: "Sawyer Jayne" <Jayne.Sawyer@xxxxxxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Fri, 20 May 2005 12:48:00 -0700
Thanks for all the great input ... off to find some money
Jayne
_____
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Dal Locke
Sent: Friday, May 20, 2005 7:46 AM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: System requirements for 15.2
I have also seen the very long delays when sliding certain diff
pairs also on large designs. I found the problem is caused by positive
dynamic shapes in close proximity somewhere in the design to the diff
pair signal. I believe the drc and healing function is slowing it down
even when the slide is not close to the shape. I moved the positive
dynamic shape off the board temporarily and everything is back to speed.
We do very large designs on Dell Xeon 2 ghz 1 GB computers with dual
nvidia monitors no problem. I also have a nice switch box that is
controlled by the scroll lock button that swithes one monitor to another
computer because the main computer does not have dual processors. I got
it at Fry's for about $40 and it is made by Ingear.
-----Original Message-----
From: george.h.patrick@xxxxxxxxxxxxxx
[mailto:george.h.patrick@xxxxxxxxxxxxxx]
Sent: Thursday, May 19, 2005 4:44 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: System requirements for 15.2
I have a dual 2.66 GHz Xeons w/ 2 GB of memory. I still get
lags on large boards with lots of planes. I am going to try 3 GB of
memory (the most I can stick in it), but there was almost NO improvement
from 1 GB to 2, so I don't think that's going to help :(
There are some differential pairs that have a 20 second lag in
them from the time I start sliding to the time they actually move.
Sure would be nice if Cadence would multi-thread Allegro so it
could actually USE both processors. It's going to get worse as Intel
switches to multi-core processors instead of increasing bus speeds.
--
George Patrick
Tektronix, Inc.
Central Engineering, PCB Design Group
P.O. Box 500, M/S 39-512
Beaverton, OR 97077-0001
Phone: 503-627-5272 Fax: 503-627-5587
http://www.tektronix.com <http://www.tektronix.com/>
http://www.pcb-designer.com <http://www.pcb-designer.com/>
It's my opinion, not Tektronix'
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Sawyer Jayne
Sent: Thursday, May 19, 2005 14:34
To: icu-pcb-forum@xxxxxxxxxxxxx
Cc: Anderson Gary; Cech Charles
Subject: [PCB_FORUM] System requirements for 15.2
Since moving to 15.2 and positive planes we have been
experiencing considerable lag time when running DRC, using the
electrical constraints for diff pairs or doing edits to the planes.
The boards we are having issue with are
17" X 14"
16 layers
23477 connects
24000 via
We are looking to upgrading our hardware. I am hoping
that some one in the group might be working with similar conditions and
already have updated to a machine that could handle it. If any one can
help me to spec a capable machine please let me know.
Thanks in advance,
Jayne Sawyer
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