[visionegg] OpenGL latency
- From: "Martin Spacek" <mspacek@xxxxxxxxxxxxxxx>
- To: visionegg@xxxxxxxxxxxxx
- Date: Fri, 4 Mar 2005 00:39:19 -0800 (PST)
Hello all,
Armed with a photodiode, a scope, a data translations dt340 I/O board and
a single frame target stimulus, we just noticed that the buffer_swap()
function swaps buffers not on the next vsync, but on the subsequent one.
This means that everything on the CRT is lagged by 1 frame with respect to
anything else we have happening in our code. This is the case for both our
Intel and AMD systems, with either an ATI or Nvidia card, in Windows 2000.
After some disbelief that this was happening, I came across a few
indications that OpenGL commands have an inherent latency. A posting by
Andrew over a year ago:
---
After plenty of trial-and-error with these issues myself, I'm also forced
to conclude that the photodiode technique is best for absolute timing
accuracy. I have some new (to me) knowledge about OpenGL cards that's not
on the website yet: as I understand it, the OpenGL "pipeline" has a
driver-dependent duration of a couple of frames, so commands sent to
OpenGL don't actually get to the display until a few frames have been
drawn. I think this explains the latency you're seeing. I'm still trying
to understand this issue, though, so I'd really like to get some feedback
from someone who knows (does anyone have any contacts with video card
driver experts?). I believe that such asynchronous operation and related
issues was on the agenda for improvements in OpenGL 2. However, a recent
scan of OpenGL 2 documents (particularly the OpenGL ARB meeting minutes)
seems to show diminished interest in this issue. Hopefully I'm wrong, but
it appears that all the ARB members are devoting most or all of their
resources to vertex and pixel shading.
---
The delay I see is only ever a single frame (5 ms), so we might just
subtract that constant off at our data collection end. Still, there's a
change it could vary. I've searched through the recently released OpenGL 2
spec, and there's no mention of latency. Does anyone know if anything can
be done about this? This is quite different from the AGP or PCI bus
latency on the system board I gather?
Cheers,
Martin Spacek
PhD student, Graduate Program in Neuroscience
Dept. of Ophthalmology and Visual Sciences
University of British Columbia, Vancouver, BC, Canada
+1-604-875-4555 ext. 66282
mspacek@xxxxxxxxxxxxxxx | http://swindale.ecc.ubc.ca
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