Hi all,
I think redriver is an old and still difficult topic.
we approach in simulation, redriver can amplify amplitude but reduce timing
margin case.
Also in test, we approach the case when adding in redriver, TX can't find
RX.
In redriver chip side, there are different kinds of redrivers: limiting
redriver and linear redriver.
It also seems the effects of redrivers are sensitive to positions it
locates, expecially for limiting redriver.
We may ship products that can work for PCIE Gen2 but fail for Gen3. Because
of shipment already, we can't add redrivers in our products. So it is an
awkard situation when we want to run higher speed on our products.
So I hope you can share some successful experiecnes on this topic. When we
judge that the insertion loss of the link is high, the first thought is
adding redriver. But do we need to think more before adding redrivers? Are
we afraid that adding redriver will give even worse effects? What kinds of
redrivers are most suitable to our link?
Hope to your discussion on this interesting topic
--
best wishes,
Jun Zhang
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