[SI-LIST] Re: min trace length

  • From: Chambers yin <chambers.yin@xxxxxxxxx>
  • To: Jeff Loyer <jeff.loyer@xxxxxxxxxx>
  • Date: Fri, 11 Dec 2015 08:18:12 +0800

Yes, short length exacerbate overshoot, undershoot from impedance
mismatching, and result into bad eye diagram. Whether does this effect
impact DRAM on DIMM more? And these DRAMs are nearer to DIMM connector
compared with DDR controller.
On Thu, Dec 10, 2015 at 10:22 PM, Jeff Loyer <jeff.loyer@xxxxxxxxxx> wrote:

My guess is that there are less reflections in the on-board case (no
connector), making very short lengths possible. In the case of the DIMM,
there would be significant impedance discontinuities from the DIMM
connector, and very short lengths would exacerbate their effects.

Jeff Loyer
Signal and Power Integrity Product Manager, Altium

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Chambers yin
Sent: Thursday, December 10, 2015 1:17 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: min trace length

Is it related to EMI instead of SI?
On Tue, Dec 8, 2015 at 7:53 PM, Chambers yin <chambers.yin@xxxxxxxxx>
wrote:

Hi experts,

As we know, there are two kinds of applications for DDR, one is SDRAM
on board, and another is DIMM. In the most of routing guide for DIMM,
there is min trace length requirement, e.g. more than 2inch or 1inch,
but there is no same requirement for SDRAM. Why?



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