Hi, Iam using PLL based clock buffer having 1:4(one clk i/p and 4 clk o/p). In all clock buffer specifications manufacturers say(TI, Pericom, maxim...) they mentioned operating frequency is 10Mhz to 150 Mhz(approzimately). Initially my host will give 400Khz to the buffer i/p after that only it will give 25 Mhz. In this can I use this clock buffer. If I use what will happen? Plz exaplain. regards Raguraman. --------------------------------- Do you Yahoo!? The all-new My Yahoo! ? Get yours free! ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu