Larry, Istvan: Thanks very much for your detailed explanation. You guys nailed the point of huge RC in this scenario-- which is mentioned in Steve's earlier post but does not strike me on the head. :) I can now reproduce the crosstalk in a simple spice simulation, either through Istvan's "capacitance divider" or a transmission line approach-- given the rise time and length of traces, I think a lumped circuit is a good approximation. It's amazing how a tiny little capacitive coupling can screw up the analogue circuit badly (the mutual capacitance between trace and pads should be less than 1pF). I can now understand why when we put a probe close to the clock trace on PCB without touching it, we picked the same replica of the clock - a simple capacitance divider effect since the probe has some capacitance and also high impedance. The fact that the replica clock swing from -20mV to +30mV also implied the RC discharging effect. Also thank Steve and all others who helped me to understand this through post here or private email. Regards Perry ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu