[SI-LIST] Re: diff pair signal

  • From: <Aubrey_Sparkman@xxxxxxxx>
  • To: <weirsp@xxxxxxxxxx>, <gopalak@xxxxxxxxxxx>,<si-list@xxxxxxxxxxxxx>
  • Date: Wed, 30 Jun 2004 10:25:49 -0500

I don't know of an actual instance where anyone has done this...

BUT, for "other logical interfaces", one might attach a single ended
sampler or detection circuit off one side IF (and big IF) acceptably
isolated with high impedance resistor or whatever.  Of course, SI work
would need to be done to insure the loading would be acceptable to the
diff pair interface.

Aubrey Sparkman=20
Enterprise Engineering Signal Integrity Team
Dell, Inc.=20
Aubrey_Sparkman@xxxxxxxx=20
(512) 723-3592


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of steve weir
Sent: Wednesday, June 30, 2004 10:12 AM
To: gopalak@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: diff pair signal=20


In such a situation where do you think the diff amplifier will obtain
its=20
reference?

At 07:38 PM 6/30/2004 +0530, Gopalakrishnan Sethuraj wrote:
>Hello
>
>
>Is there any scenario where one (positive)  of the  differential pair=20
>signal output  will be connected to single pin in LVDS or other logical

>interfaces ?
>
>
>
>
>
>Thanks&Regards
>
>Gopalakrishnan
>
>
>
>
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