[SI-LIST] Re: clock 2nd harmonic

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Thu, 17 May 2012 17:34:46 -0700

You have a combination of an energy source, high impedance loading, and 
adequately efficient transmitter.  You can attack either or both.

The energy source is anything that causes the duty cycle to be anything 
other than exactly 50%, including distorted edges, loading going through 
power cavities, etc.  But it can also be the result of circuitry 
operating from a multiplied version of the clock.

High impedance loading can be via a power cavity that has too high of an 
impedance in the frequency range of the clk*2, or a component / device 
structure that has a high impedance at clk*2.  If you are exciting a 
resonance near that frequency, then you can take steps to tame it.

There are lots of things that can make efficient transmitters.  Look for 
structures that are near the wavelength of clk*8.  Look for signals 
crossing slots, power layers coupling to each other or other best 
practice violation.

Steve

On 5/17/2012 11:43 AM, Joel Brown wrote:
> I am having an EMI problem with the second harmonic of a 65 MHz clock.
> There is a strong emission at 130 MHz.
> What is most likely causing the second harmonic and how can I reduce it?
> The clock waveform does not look seriously distorted.
> Thanks
>
>
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