[SI-LIST] abt.Tco and Bufferdelay
- From: "zanglinyuan" <zanglinyuan@xxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 18 Jul 2002 16:15:36 +0800
Hi. Everybody!
Now I'm intrested in the Timing calculation,but confused by the following:
1.What's the relationship between the Tco and Buffer delay?
2.Does the IBIS model V/I,V/T curve include the Buffer delay?
3.Does IBIS model extracted have nothing to do with the logic core?
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