[SI-LIST] Re: [SI-LIST]6 layers stackup
- From: "Dave Anthony" <x2y@xxxxxxx>
- To: "'Joel Brown'" <joel@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 28 Feb 2008 08:08:29 -0500
Joel, Yageo and Johanson Dielectrics are both fully established
in volume production and Samsung is now ramping volume
production, so the landscape has changed.
http://www.x2y.com/mfgs.htm
Regards,
Dave
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Joel Brown
Sent: Wednesday, February 27, 2008 7:29 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [SI-LIST]6 layers stackup
I thought the advantage of X2Y was not the mounting via pattern,
but the
fact that there is mutual coupling of fields by currents flowing
in opposite
directions both internal to the capacitor and the in the mounting
which
effectively reduces the inductance. This makes sense to me and is
beleivable, it has a mechanism that a standard 0402 does not
have. The
reasons I have not yet used X2Y:
They are manufactured by only two companies, the second company
has only
been recent.
The cost per part is higher than a standrad 0402, this can be
mitigated by
very large volume buying (not us) or replacing multiple 0402s
with a single
X2Y.
They can be a challenge to fit into tight areas.
They make the assumption that using vias to planes are better
than a short
wide surface trace connection directly from the capacitor to an
IC pin. I
suppose they could be connected using a surface trace but then
the space
issue comes up again.
I have not yet had the time, money and equipment to verify that
X2Y performs
better than 0402 on actual boards that we design. There comes a
point when
you have to stop telling your staff to do something because the
EMI
consultant said so, or you read it in a book, or some expert's
simulation
showed it was so. You have to build a board and make valid
measurements and
we all know that is not easily done.
Joel
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Todd Hubing
Sent: Wednesday, February 27, 2008 11:04 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [SI-LIST]6 layers stackup
Scott and Steve,
I hadn't really intended to get drawn into this conversation. I
would be
happy to discuss inductance calculations with either of you off
line.
I agree with Scott's statement that your data shows that a well
connected
6-via three-terminal capacitor mount has half the inductance of a
well
connected 4-via two-terminal capacitor. This is consistent with
our
calculations.
Todd
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Scott McMorrow
Sent: Wednesday, February 27, 2008 12:34 PM
To: Lee Ritchey
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [SI-LIST]6 layers stackup
Lee
Fortunately for us, the physics are clear. If the correct
land/via=20
patterns are used, 50 mils of via reach will not swamp out the=20
advantages
of some types of low inductance capacitors. In fact, the=20
difference will
asymptotically approach the inductance ratio of the=20 coupled
via systems
themselves at infinite via length.=20
For the case of X2Y capacitors with 6-vias vs. 0402 with 4-vias,
this=20
ratio is 2:1. That is, the 6-via pattern of the X2Y is 2 times
as=20
efficient as the 4-via 0402 pattern. Even if we normalize for
number of
vias, the X2Y pattern is still 1.33 times more efficient per via
drill.
However, in real PCBs we are not dealing with infinitely long
vias, so=20
the performance advantage is much better, and typically 3:1 or
4:1=20
depending on the 0402 via pattern (2-via or 4-via) used.
However, if you incorrectly design your board such that a PRF
occurs=20
within a few octaves of where you need low PDS impedance, that is
a=20
different issue altogether, which can only be resolved by moving
the PRF
with the correct spatial distribution of capacitors. Low
inductance=20
capacitors are also more efficient in dealing with this problem.
Scott
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed(r) is the registered service mark of Teraspeed
Consulting Group
LLC
Lee Ritchey wrote:
> Tom,
>
> Well put!
>
>
> =20
>> [Original Message]
>> From: Tom Biggs <tbiggs@xxxxxxxxxxxxxxxxxxxxx>
>> To: <si-list@xxxxxxxxxxxxx>
>> Date: 2/26/2008 6:16:04 PM
>> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>>
>> You can take the bulldozer analogy two ways. It depends on
whether
you
>> care about the weight of the bulldozer with passengers, or
just the
>> weight of the passengers.
>>
>> Steve's test fixture was geared toward 'weighing the
passengers'.
Lee's
>> was toward 'weighing the bulldozer'. So they each served their
purpose.
>> His whole point was that the vias going down 50 mils on a
board are
>> going to swamp out the advantages of low inductance caps. His
test
>> fixture, by design, had vias that go down 50mils. I'm sure
he'd agree
>> that this would be a bad fixture for measuring the cap itself,
which
was
>> not his goal.
>>
>> The appropriate land pattern to use for the low-inductance
caps is a
>> separate issue. I'd be curious to see Lee's board with Steve's
land
>> pattern.
>>
>> -tom
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
>> On Behalf Of Muranyi, Arpad
>> Sent: Tuesday, February 26, 2008 1:31 PM
>> To: si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>>
>> Can't resist to illustrate this with an example:
>>
>> If you want to compare the weight of an ant and a cricket and
you put
>> them on top of the same bulldozer, you will not see much
difference
in
>> their weight...
>>
>> Arpad
>>
-----------------------------------------------------------------
-------
>>
>> -----Original Message-----
>> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
>> On Behalf Of Lee Ritchey
>> Sent: Tuesday, February 26, 2008 11:16 AM
>> To: Charles Grasso; Scott McMorrow
>> Cc: Steve Weir; QU Perry; si-list@xxxxxxxxxxxxx
>> Subject: [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup
>>
>> What does the test vehicle have to do with it? Both
capacitors are
>> seeing
>> the same stackup. It's apples and apples. Why 26 layers?
Lots of
>> PCBs
>> have 26 layers, pretty much all of them in terabit routers.
This PCB
>> was used to test may things besides these two capacitors.
>>
>> What is being presented is the difference between the two
capacitors
>> under the same set of test conditions and it is not much.
>>
>> There are two sets of tests. One with the capacitors
connected to
the
>> first two planes inside the PCB, which is the lowest added
inductance
>> and the other is with the capacitors attached to two planes
further
down
>> in the PCB.
>>
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