Hi All, I need to connect 32M8 256Mb SDRAM to a processor. The SDRAM has 13 Address Lines for Row Decoding (8K rows) and 10 Address lines for column decoding (1K columns) and two additional address lines BA0 and BA1. I am connecting A0-A12 of processor's address bus to A0-12 of SDRAM and A13,A14 of processor to BA0,BA1 of SDRAM (alongwith other signals of read or write).Is this way of connection true ?. Also I want to know of any hardware or software technique by which we can limit the size of 256Mb RAM to 128Mb or 64 Mb. Regards, Adeel ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu