[SI-LIST] Resistor packs, SI issues?

  • From: "Anders Frederiksen" <af@xxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 15 Nov 2005 15:46:33 +0100 (CET)

Hello All,

I've encountered a constraint on the signal allocation in resistor packs. The
application is a DDR-I interface. Frankly I was quite puzzled to see that Intel
specifically prohibit routing DQS (strobes) and other (ie. data mask) signal in 
one
respack!
If it weren't for the notes I'd never blink mixing <200MHz signals in respacks. 
I'm
using 0804 packs and fail to realize that cross talk could be a big problem 
here? Of
course the signals are raised from the reference plane and the horizontal 
spacing
between the signals is, say, double up for discrete resistors (or separate 
packs).
Is it the base material used in the packs that cause "issues"? Or am I 
completely
missing something??? I haven't been able to find any investigations regarding 
use of
respacks - so I'm very interested in hearing about your experiences/opinions!

Cheers,
 Anders

------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl?Si-List_FAQ

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                //www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  

Other related posts: