[SI-LIST] Re: Regarding etch factor calculation
- From: "Alexander Ippich" <Alexander.Ippich@xxxxxxxxxxxxx>
- To: "steve weir" <weirsi@xxxxxxxxxx>, "sai krishnan" <sai_krishnan_s@xxxxxxxxx>
- Date: Wed, 25 May 2011 15:35:20 +0200
Sai,
what Polar calculator are you using? If it would be the old (by now obsolete)
CITS 25, this would be a big contributor to the difference. This old tool had
quite a significant offset to other tools on outerlayer impedance simulations.
alex
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of steve weir
Sent: Wednesday, May 25, 2011 2:45 PM
To: sai krishnan
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Regarding etch factor calculation
A 10% variation in impedance takes either a 20% difference in effective
dK or around a 10% variation in effective trace width, or a
combination. First make sure that the you are getting the right
physical numbers from your fab house for the etch profile. Are you
etching very narrow traces?
Steve.
On 5/25/2011 5:36 AM, sai krishnan wrote:
> Hi Steve,
> Thanks for the reply. For microstrip, I included soldermask thickness
> as 0.6mils. I have not done any measurement. As mentioned in my
> email, my observations are based on the caculcations from the Polar
> tool. the difference is around 5ohms.
> I am seeing in my previous posting, alignment got distorted. I am
> posting my query again:
> I am trying to understand the EtchFactor value in the stackup. I am
> checking the PCB stackup received from fab house. The impedance
> value resulting from my calculation using Polar for microstrip lines,
> differs from the values provided by the fab house. For striplines,
> it comes closely to the fabhouse calculations.
> I am using the following approach:
> Etch factor = W1 (bottom side width of a trace ) – W ( top side width
> of a trace) = copper thickness (T)
> For microstrip traces, I included the plating thickness and copper
> thickness for the total thickness (T). For stripline traces, just
> the copper thickness of trace.
>
> Does my approach on calculating Etchfactor requires any
> modifications. Why I am getting different impedance value for
> microstrip . Any inputs will be helpful.
> Thanks & Regards,
> Sai
>
> --- On *Wed, 5/25/11, steve weir /<weirsi@xxxxxxxxxx>/* wrote:
>
>
> From: steve weir <weirsi@xxxxxxxxxx>
> Subject: [SI-LIST] Re: Regarding etch factor calculation
> To: si-list@xxxxxxxxxxxxx
> Date: Wednesday, May 25, 2011, 5:46 PM
>
> How far off are you from what your fab house says? Have you measured
> test traces?
>
> Microstrip effective dielectric constant is affected by the solder
> mask.
> If the surface treatment includes Ni, that will also have an impact.
>
> Steve
>
> On 5/25/2011 5:07 AM, sai krishnan wrote:
> > Hi All,
> > Â
> > I am trying to understand the EtchFactor value in the stackup. Â Â
> > Â
> > I am  checking the PCB stackup received from fab house.  Â
> The impedance value resulting from my calculation using Polar for
> microstrip lines,  differs from the values  provided by the fab
> house. For striplines, it comes closely to the fabhouse
> calculations.
> > Â
> > I am using the following approach:Â Â
> > Etch factor = W1 (bottom side width of a trace )  – W ( top
> side width of a trace)    = copper thickness (T) .
> > Â
> > For microstrip traces, I included the plating thickness and
> copper thickness for the total thickness (T). Â Â For stripline
> traces, just the copper thickness of trace.
> > Â
> > Does my approach on calcualating Etchfactor requires any
> modifications. Why I am getting different impedance value for
> microstrip  . Any inputs will be helpful.
> > Â
> > Regards,
> > Sai
> > ------------------------------------------------------------------
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