Well said!
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Smith, Larry
Sent: Monday, September 19, 2016 3:22 PM
To: heidi_barnes@xxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Power Integrity meets Power Electronics in the
Midwest
Heidi - In my mind, the power integrity problem is "DC to daylight." We
need to concern ourselves with everything from seconds to pico-seconds,
which is more than 10 decades of frequency content.
Power integrity engineers in the mobile space are vitally concerned about
battery life and protection of the battery from over-current. In the server
space we are concerned with power consumption from the building and public
utility grid. We are concerned with VRMs including the SMPS (switched mode
power supply, buck converters) and the LDO (low drop out, linear regulators)
and their interface to bulk capacitors on the board. We are concerned with
the high-frequency ceramic capacitors and their mount to the board power
planes. Likewise, the electronic package, package caps, vias and package
power planes. Then there are the die bumps, on-die power grid in 10 layers
of metal, vias and on-die capacitance.
We are concerned with clock edge noise in a small portion of a 2 GHz clock
cycle (500 pSec period) as well as the VRM droop that lasts for
micro-seconds (1000's of clock cycles) and sufficiently low battery
impedance to support maximum loading.
It really all comes down to managing your PDN impedance in all frequency
bands, time zones and levels of assembly.
Regards,
Larry Smith
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of heidi_barnes@xxxxxxxxxxxx
Sent: Monday, September 19, 2016 1:23 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Power Integrity meets Power Electronics in the
Midwest
Looks like the link got corrupted in translation....
Here is a tiny url to replace the long one http://tinyurl.com/jum7euh ;
Or go to www.keysight.com/find/events
-Heidi
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of heidi_barnes@xxxxxxxxxxxx
Sent: Monday, September 19, 2016 10:40 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Power Integrity meets Power Electronics in the Midwest
To All:
I have a question for the SI world now that PI is rapidly catching on to the
world of high frequencies.
Does Power Integrity include Power Electronics and Power Distribution
Networks... or does it only apply to powering high speed digital devices?
Next week I will be co-presenting with my colleague Chris Mueth. I will be
covering the latest in Power Integrity, and Chris Mueth on Power Electronics
at three stops in the Midwest:
September 27th - Bloomington, Mn (Minneapolis) September 28th - Schaumburg,
IL (Chicago) September 29th - Novi, MI (Detroit) (Special guest Steve
Sandler of Picotest, author of Power Integrity)
If you are interested, please check out the link or send me a reply:
http://www.keysight.com/main/eventDetail.jspx?cc=US&lc=eng&ckey'26153&nid=-3
5198.0.08&id'26153
At our final stop in Detroit, industry expert Steve Sandler of Picotest and
author of the book Power Integrity: Measuring, Optimizing, and
Troubleshooting Power Related Parameters in Electronics Systems will be a
guest speaker. He always welcomes questions from the audience, and I am
sure he will have an answer for my PI/PE/PDN question.
Best Regards,
Heidi Barnes
Keysight Technologies, EEsof EDA Software
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