Hello, I am evaluating 2 clock drivers for a project from different manufacturers and found that one specified phase jitter in ps, (RMS) and the other period jitter in ps, RMS. The spec for phase jitter was not phase noise or in dBc/Hz. It helpfully adds that the cycle-cycle jitter on its input will equal the output, the part wont add jitter. I searched SI-list and couldnt find much info. Could somebody help provide some tips on how they compare/ correlate. I did get some complex discussion involving convolution and integrals. If it can only be understood at that level (rather beyond me :-)) pls let me know. I am now studying a Corning apnote on VCXO phase jitter that is reasonably OK, but would appreciate any tips. Thanks & regards, Jai Shanker W. ACI Pvt Ltd __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu