Hello In time domain , we usually take TIE jitter as phase jitter . It determines the ideal clock frequency by measuring the frequency of all the cycles in your waveform and taking the average of all the measurements. Or you just enter the value for the ideal clock frequency manually . Once the ideal clock frequency is determined, all of the cycles of your waveform are compared to the ideal clock frequency and the error statistics are computed. The period measurement is defined as the time between the middle threshold crossings of two consecutive, like-polarity edges. The cycle-to-cycle jitter measurement measures the period of the first cycle of the waveform and subtracts it from the period of the second cycle of the waveform for the first measurement result. Then, the second cycle of the waveform is measured and subtracted from the third cycle period for the second measurement result. This operation continues until all of the cycles of the waveform have been measured. In many cases , the jitter differences between input and output are caused by channel/media (ISI) , crosstalk/coupling to the channel/media . Crosstalk/coupling can contribute as PJ . If PJ jitter is originated at transmitter side , not by channel/media , we won't find much difference at input/output . There is one phase noise analyzer which is customized for clock jitter analysis . You may find more details at http://cp.literature.agilent.com/litweb/pdf/5989-5131EN.pdf http://cp.literature.agilent.com/litweb/pdf/5989-0906EN.pdf I also list some other jitter related articles for your reference : Jitter Analysis Techniques for High Data Rates Application Note 1432 http://cp.literature.agilent.com/litweb/pdf/5988-8425EN.pdf Measuring Jitter in Digital Systems Application Note 1448-1 http://cp.literature.agilent.com/litweb/pdf/5988-9109EN.pdf Advanced Jitter Generation and Analysis up to 3.35 Gbps with the Agilent 81134A Pulse Pattern Generator & 86100C Infiniium Wide-Bandwidth DCA-J Oscilloscope Product Note http://cp.literature.agilent.com/litweb/pdf/5989-1650ENDE.pdf HDMI(tm) Compliant Jitter Tolerance Test Solution for Cable and RX Test with ParBERT 81250 http://cp.literature.agilent.com/litweb/pdf/5989-4959EN.pdf 7 Hints for Making Innovative Signal Source Measurements in Wireless RF Design and Verification Using the Signal Source Analyzer http://cp.literature.agilent.com/litweb/pdf/5989-1618EN.pdf Finding Sources of Jitter with Real-Time Jitter Analysis http://cp.literature.agilFent.com/litweb/pdf/5988-9740EN.pdf Agilent Technologies EZJIT and EZJIT Plus Jitter Analysis Software for Infiniium Series Oscilloscopes datasheet http://cp.literature.agilent.com/litweb/pdf/5989-0109EN.pdf Selecting RJ Bandwidth in EZJIT Plus Software http://cp.literature.agilent.com/litweb/pdf/5989-5056EN.pdf Choosing the ISI Filter Size for EZJIT Plus Arbitrary Data Jitter Analysis http://cp.literature.agilent.com/litweb/pdf/5989-4974EN.pdf Analyzing Jitter Using Agilent EZJIT Plus Software AN1563 http://cp.literature.agilent.com/litweb/pdf/5989-3776EN.pdf Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A http://cp.literature.agilent.com/litweb/pdf/5989-4967EN.pdf Precision Jitter Analysis Using the Agilent 86100C DCA-J Product Note 86100C-1 http://cp.literature.agilent.com/litweb/pdf/5989-1146EN.pdf Regards Jiwei Du Digital Design Test PLM -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Jai Shanker Sent: 2006年8月24日 23:31 To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] Re: Phase jitter vs. period jitter Hello, I am evaluating 2 clock drivers for a project from different manufacturers and found that one specified phase jitter in ps, (RMS) and the other period jitter in ps, RMS. The spec for phase jitter was not phase noise or in dBc/Hz. It helpfully adds that the cycle-cycle jitter on its input will equal the output, the part wont add jitter. I searched SI-list and couldnt find much info. Could somebody help provide some tips on how they compare/ correlate. I did get some complex discussion involving convolution and integrals. If it can only be understood at that level (rather beyond me :-)) pls let me know. I am now studying a Corning apnote on VCXO phase jitter that is reasonably OK, but would appreciate any tips. Thanks & regards, Jai Shanker W. ACI Pvt Ltd __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! 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