[SI-LIST] Re: PECL termination technique?
- From: "john lipsius" <johnlipsius@xxxxxxxxx>
- To: <hariharan@xxxxxxxxxxx>, "SI-LIST" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 14 Feb 2003 04:27:29 -0800
Corrected eqns. ... bad parentheses
Ioh = [(Rt/R)*(Voh - Vol) + Voh] / ( R + 2Rt )
Iol = [(Rt/R)*(Vol - Voh) + Vol] / ( R + 2Rt )
----- Original Message -----
From: john lipsius
To: hariharan@xxxxxxxxxxx ; SI-LIST
Sent: Friday, February 14, 2003 4:21 AM
Subject: [SI-LIST] Re: PECL termination technique?
Hariharan,
I agree something's missing.
Perhaps your source outputs are pulled down close to the
driver on another schematic sheet. That's the only way it might
work. The MC100ELT23D may have internal input pulldowns, but
that's just to assure safe input levels when undriven.
Perhaps the termination was just 'borrowed' from another
design and is missing the biasing. The single diff. termination
at the load is typical of long links, like a across a backplane, where
grounds can be different. The driver end would have the
pulldowns for biasing in that case.
The 33 and 120 ohm resistors appear to be series damping and
Zdiff termination, but no biasing appears to be provided.
Recap....
1. Somewhere, these are required on each wire:
* establish dc driver current for linear operation
* bias to Vcm=Vcc-1.3 for example (typ. PECL)
2. Another function is Zdiff matching at the load
---Rs-------------------
|
R
|
Vtt ---Rt--gnd Y termination with optional Rs
| for attenuation of reflections
R or for EMC
|
---Rs-------------------
The Y termination can provide biasing & impedance matching
by choosing R and Rt and setting Vtt=Vcc-2. Then the drivers
will operate near Vcm.
Assuming Zdiff=100, then R=50 since Vtt is a 'virtual' gnd.
Applying node current analysis, Voh+Vol = Vtt(2+[R/Rt]).
Then R and Rt pop out.
For Vcc=3.3V, Rt=R but for Vcc=5V, Rt = 2.13*R , using typical PECL
Voh, Vol.
Tolerances:
Just make sure you don't choose R and Rt such that, at VOLmin,
a driver cuts off. R should be 1% tol. or better.
Ioh = (Rt/R)*(Voh - Vol) + Voh) / ( R + 2Rt )
Iol = (Rt/R)*(Vol - Voh) + Vol) / ( R + 2Rt )
Plugging in the Vol(min) and Voh(max) at worst case temperatures,
Rt max., and Vcc(min) will give a min. Iol, which must be greater than
some vendor minimum such as 0 mA (cutoff). If one driver gets in cutoff
it'll be slow and you'll develop a common mode in driven diff. signal
which will skew your duty cycle, create comm mode reflections, worsen
emc, etc. The Rs helps attenuate the inevitable common mode noise
even with a good termination.
-John
----- Original Message -----
From: hariharan
To: si-list@xxxxxxxxxxxxx
Sent: Thursday, February 13, 2003 8:51 PM
Subject: [SI-LIST] PECL termination technique?
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Hi,
This is regarding a PECL termination. I'm presently reviewing a hardware
design, in that the designer has used a PECL to TTL converter for a clock
Oscillator's PECL output connecting to a CPLD via a PECL to TTL translator.
Here the designer has used a termination ie PECL - PECL (Differential), say
he has used a 120 ohm RES connecting the positive and negative of the
differnential pair.
(POS) +------33 ohms---------------------------+ (POS)
>
120 ohms
>
(NEG) - ------33 ohms---------------------------- - (Neg)
the devices are CY7B951-SC (Cypress) to Motorolla's (MC100ELT23D).
Here in the above case I understand the designer has opted for a power
consumption less termination. But the usual termination we go in for is
a Y termiantion ( with ref. to ONSEMI PECL design - Application note).
Can anyone help me out to understand how the designer would have arrived at
those values and the termination technique.
regards
Hariharan
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<DIV> </DIV>
<DIV><SPAN class=3D328163704-14022003>Hi,</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN><SPAN =
class=3D328163704-14022003>This=20
is regarding a PECL termination. I'm presently reviewing a hardware =
design, in=20
that the designer has used a PECL to TTL converter for a clock =
Oscillator's PECL=20
output connecting to a CPLD via a PECL to TTL translator. </SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN><SPAN =
class=3D328163704-14022003>Here=20
the designer has used a termination ie PECL - PECL (Differential), say =
he has=20
used a 120 ohm RES connecting the positive and negative of the =
differnential=20
pair.</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN><SPAN=20
class=3D328163704-14022003> &nbs=
p; (POS)=20
+------33 ohms---------------------------+ (POS)</SPAN></DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p;  =
; =
&=
nbsp; >=20
</SPAN></DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p;  =
; =
&=
nbsp; 120=20
ohms</SPAN></DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p;  =
; =
&=
nbsp; =20
></SPAN></DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p; (NEG) =20
- ------33 ohms---------------------------- - (Neg)</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN class=3D328163704-14022003>the devices are CY7B951-SC=20
(Cypress) to Motorolla's (MC100ELT23D). </SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN class=3D328163704-14022003>Here in the above case I =
understand the=20
designer has opted for a power consumption less termination. But the =
usual=20
termination we go in for is </SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003>a Y termiantion ( with ref. to =
ONSEMI PECL=20
design - Application note).</SPAN></DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p; =20
</SPAN></DIV>
<DIV> </DIV>
<DIV><SPAN class=3D328163704-14022003>Can anyone help me out to =
understand how the=20
designer would have arrived at those values and the termination=20
technique.</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN class=3D328163704-14022003>regards</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003>Hariharan</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN> </DIV>
<DIV><SPAN=20
class=3D328163704-14022003> &nbs=
p;  =
; =
=20
</SPAN></DIV>
<DIV><SPAN class=3D328163704-14022003></SPAN><BR> </DIV>
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